From ea1c407376f95e7a6d0604cfdc3f09758043420c Mon Sep 17 00:00:00 2001 From: ChipSec Date: Mon, 15 Dec 2025 10:45:06 -0800 Subject: [PATCH] Update to release/2.0.0-rc5 Signed-off-by: ChipSec --- _sources/development/Developing.rst.txt | 2 +- _sources/index.rst.txt | 6 +- .../modules/chipsec.cfg.8086.adl.xml.rst.txt | 2 +- .../modules/chipsec.cfg.8086.apl.xml.rst.txt | 9 - .../modules/chipsec.cfg.8086.avn.xml.rst.txt | 11 - .../modules/chipsec.cfg.8086.bdw.xml.rst.txt | 8 - .../modules/chipsec.cfg.8086.bdx.xml.rst.txt | 13 - .../modules/chipsec.cfg.8086.byt.xml.rst.txt | 11 - .../modules/chipsec.cfg.8086.cfl.xml.rst.txt | 11 - .../modules/chipsec.cfg.8086.cht.xml.rst.txt | 14 - .../modules/chipsec.cfg.8086.cml.xml.rst.txt | 6 - .../chipsec.cfg.8086.common.xml.rst.txt | 8 - .../modules/chipsec.cfg.8086.dnv.xml.rst.txt | 12 - .../modules/chipsec.cfg.8086.ehl.xml.rst.txt | 9 - .../modules/chipsec.cfg.8086.glk.xml.rst.txt | 8 - .../modules/chipsec.cfg.8086.hsw.xml.rst.txt | 8 - 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mode 100644 modules/chipsec.modules.hsw.html delete mode 100644 modules/chipsec.modules.ivb.html delete mode 100644 modules/chipsec.modules.snb.html rename modules/{chipsec.hal.igd.html => chipsec.utilcmd.hals_cmd.html} (76%) rename modules/{chipsec.hal.ec.html => chipsec.utilcmd.mm_msgbus_cmd.html} (65%) diff --git a/_sources/development/Developing.rst.txt b/_sources/development/Developing.rst.txt index 9711d4dd..617f17fd 100644 --- a/_sources/development/Developing.rst.txt +++ b/_sources/development/Developing.rst.txt @@ -17,7 +17,7 @@ Most modules read some platform configuration and then pass or fail based on the .. code-block:: python - ble = self.cs.control.get('BiosLockEnable') + ble = self.cs.control.get_list_by_name('BiosLockEnable').is_all_value(1) 3. React based on the status of the control: diff --git a/_sources/index.rst.txt b/_sources/index.rst.txt index d6c24a6e..75e89366 100644 --- a/_sources/index.rst.txt +++ b/_sources/index.rst.txt @@ -1,10 +1,10 @@ -.. CHIPSEC 1.13.19 documentation file, created by +.. CHIPSEC 2.0.0-rc5 documentation file, created by sphinx-quickstart on Wed Mar 25 13:24:44 2015. You can adapt this file completely to your liking, but it should at least contain the root `toctree` directive. -CHIPSEC 1.13.19 -=============== +CHIPSEC 2.0.0-rc5 +================= CHIPSEC is a framework for analyzing platform level security of hardware, devices, system firmware, low-level protection mechanisms, and diff --git a/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt index 68f4ddf6..323ed551 100644 --- a/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt @@ -5,7 +5,7 @@ Path: chipsec\\cfg\\8086\\adl.xml CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2021-2022, Intel Corporation +Copyright (c) 2023, Intel Corporation This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License diff --git a/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt deleted file mode 100644 index 02dd8d2e..00000000 --- a/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt +++ /dev/null @@ -1,9 +0,0 @@ -apl -======= - -Path: chipsec\\cfg\\8086\\apl.xml - - -XML configuration for Apollo Lake based SoCs -document id 334818/334819 - diff --git a/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt deleted file mode 100644 index 77a37b9b..00000000 --- a/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt +++ /dev/null @@ -1,11 +0,0 @@ -avn -======= - -Path: chipsec\\cfg\\8086\\avn.xml - - -XML configuration for Avoton based platforms - -* Intel(R) Atom(TM) Processor C2000 Product Family for Microserver, September 2014 - http://www.intel.com/content/www/us/en/processors/atom/atom-c2000-microserver-datasheet.html - diff --git a/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt deleted file mode 100644 index de53c4d4..00000000 --- a/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -bdw -======= - -Path: chipsec\\cfg\\8086\\bdw.xml - - -XML configuration for Broadwell based platforms - diff --git a/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt deleted file mode 100644 index 90402f95..00000000 --- a/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt +++ /dev/null @@ -1,13 +0,0 @@ -bdx -======= - -Path: chipsec\\cfg\\8086\\bdx.xml - - -XML configuration file for Broadwell Server based platforms -Intel (c) Xeon Processor E5 v4 Product Family datasheet Vol. 2 -Intel (c) Xeon Processor E7 v4 Product Family datasheet Vol. 2 -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update -Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet - diff --git a/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt deleted file mode 100644 index e57d29ec..00000000 --- a/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt +++ /dev/null @@ -1,11 +0,0 @@ -byt -======= - -Path: chipsec\\cfg\\8086\\byt.xml - - -XML configuration for Bay Trail based platforms - -* Intel(R) Atom(TM) Processor E3800 Product Family Datasheet, May 2016, Revision 4.0 - http://www.intel.com/content/www/us/en/embedded/products/bay-trail/atom-e3800-family-datasheet.html - diff --git a/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt deleted file mode 100644 index 29d7e9d5..00000000 --- a/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt +++ /dev/null @@ -1,11 +0,0 @@ -cfl -======= - -Path: chipsec\\cfg\\8086\\cfl.xml - - -XML configuration file for Coffee Lake - -* 8th Generation Intel(R) Processor Family for S-Processor Platforms - https://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html - diff --git a/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt deleted file mode 100644 index 06aa9ebe..00000000 --- a/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt +++ /dev/null @@ -1,14 +0,0 @@ -cht -======= - -Path: chipsec\\cfg\\8086\\cht.xml - - -XML configuration for Cherry Trail and Braswell SoCs - -* Intel(R) Atom(TM) Processor Z8000 series datasheet - http://www.intel.com/content/www/us/en/processors/atom/atom-z8000-datasheet-vol-2.html - -* N-series Intel(R) Pentium(R) and Celeron(R) Processors Datasheet - http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/pentium-celeron-n-series-datasheet-vol-2.pdf - diff --git a/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt deleted file mode 100644 index 3d8b8be3..00000000 --- a/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt +++ /dev/null @@ -1,6 +0,0 @@ -cml -======= - -Path: chipsec\\cfg\\8086\\cml.xml - - XML configuration file for Comet Lake diff --git a/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt deleted file mode 100644 index 4ab92728..00000000 --- a/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -common -========== - -Path: chipsec\\cfg\\8086\\common.xml - - -Common (default) XML platform configuration file - diff --git a/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt deleted file mode 100644 index 11d38718..00000000 --- a/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt +++ /dev/null @@ -1,12 +0,0 @@ -dnv -======= - -Path: chipsec\\cfg\\8086\\dnv.xml - - -XML configuration file for Denverton - -* Intel Atom(R) Processor C3000 Product Family - https://www.intel.com/content/www/us/en/processors/atom/atom-technical-resources.html - 337018-002 - diff --git a/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt deleted file mode 100644 index e587fe41..00000000 --- a/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt +++ /dev/null @@ -1,9 +0,0 @@ -ehl -======= - -Path: chipsec\\cfg\\8086\\ehl.xml - - -XML configuration file for Elkhart Lake -Document ID: 635255, 636112, 636722, 636723 - diff --git a/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt deleted file mode 100644 index 04772a7d..00000000 --- a/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -glk -======= - -Path: chipsec\\cfg\\8086\\glk.xml - - XML configuration for GLK - Document ID: 336561-001 - diff --git a/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt deleted file mode 100644 index 5a9a80db..00000000 --- a/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -hsw -======= - -Path: chipsec\\cfg\\8086\\hsw.xml - - -XML configuration file for Haswell based platforms - diff --git a/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt deleted file mode 100644 index 0632542a..00000000 --- a/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt +++ /dev/null @@ -1,13 +0,0 @@ -hsx -======= - -Path: chipsec\\cfg\\8086\\hsx.xml - - -XML configuration file for Haswell Server based platforms -Intel (c) Xeon Processor E5-1600/2400/2600/4600 v3 Product Family datasheet Vol. 2 -Intel (c) Xeon Processor E7-8800/4800 v3 Product Family datasheet Vol. 2 -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update -Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet - diff --git a/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt deleted file mode 100644 index 2657dfc3..00000000 --- a/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt +++ /dev/null @@ -1,6 +0,0 @@ -icl -======= - -Path: chipsec\\cfg\\8086\\icl.xml - - XML configuration file for Ice Lake diff --git a/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt deleted file mode 100644 index 90040c2d..00000000 --- a/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -icx -======= - -Path: chipsec\\cfg\\8086\\icx.xml - - -XML configuration file for Icelake/Lewisburg Server - diff --git a/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt deleted file mode 100644 index 5fbbe833..00000000 --- a/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt +++ /dev/null @@ -1,11 +0,0 @@ -iommu -========= - -Path: chipsec\\cfg\\8086\\iommu.xml - - -XML configuration file for Intel Virtualization Technology for Directed I/O (VT-d) - -* Section 10 of Intel Virtualization Technology for Directed I/O - http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf - diff --git a/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt deleted file mode 100644 index 2ec89186..00000000 --- a/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -ivb -======= - -Path: chipsec\\cfg\\8086\\ivb.xml - - -XML configuration for IvyBridge based platforms - diff --git a/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt deleted file mode 100644 index fdf4a476..00000000 --- a/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -ivt -======= - -Path: chipsec\\cfg\\8086\\ivt.xml - - -XML configuration file for Ivytown (Ivy Bridge-E) based platforms - diff --git a/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt deleted file mode 100644 index 397fe376..00000000 --- a/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -jkt -======= - -Path: chipsec\\cfg\\8086\\jkt.xml - - -XML configuration file for Jaketown (Sandy Bridge-E) based platforms - diff --git a/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt index f6ae0a06..f9974f64 100644 --- a/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt @@ -3,12 +3,4 @@ kbl Path: chipsec\\cfg\\8086\\kbl.xml - -XML configuration file for Kaby Lake based platforms - -http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html - -* 7th Generation Intel(R) Processor Families for U/Y-Platforms - -* 7th Generation Intel(R) Processor Families I/O for U/Y-Platforms - + XML configuration file for Ice Lake diff --git a/_sources/modules/chipsec.cfg.8086.kbl_orig.xmls.rst.txt b/_sources/modules/chipsec.cfg.8086.kbl_orig.xmls.rst.txt new file mode 100644 index 00000000..a159adb6 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.kbl_orig.xmls.rst.txt @@ -0,0 +1,14 @@ +kbl_orig. +============= + +Path: chipsec\\cfg\\8086\\kbl_orig.xmls + + +XML configuration file for Kaby Lake based platforms + +http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html + +* 7th Generation Intel(R) Processor Families for U/Y-Platforms + +* 7th Generation Intel(R) Processor Families I/O for U/Y-Platforms + diff --git a/_sources/modules/chipsec.cfg.8086.mtl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.mtl.xml.rst.txt index 5aab24c9..022f1fe3 100644 --- a/_sources/modules/chipsec.cfg.8086.mtl.xml.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.mtl.xml.rst.txt @@ -3,23 +3,4 @@ mtl Path: chipsec\\cfg\\8086\\mtl.xml - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2024, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - + XML configuration file for Ice Lake diff --git a/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt deleted file mode 100644 index 37ad1f95..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt +++ /dev/null @@ -1,30 +0,0 @@ -pch_1xx -=========== - -Path: chipsec\\cfg\\8086\\pch_1xx.xml - - -XML configuration file for 100 series PCH based platforms - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2020-2021, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - -* Intel(R) 100 Series Chipset Family Platform Controller Hub (PCH) - http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html - diff --git a/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt deleted file mode 100644 index 9469fdb6..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt +++ /dev/null @@ -1,11 +0,0 @@ -pch_2xx -=========== - -Path: chipsec\\cfg\\8086\\pch_2xx.xml - - -XML configuration file for 200 series PCH based platforms - -* Intel(R) 200 Series Chipset Family Platform Controller Hub (PCH) - http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html - diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt deleted file mode 100644 index 2f580567..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt +++ /dev/null @@ -1,10 +0,0 @@ -pch_3xx -=========== - -Path: chipsec\\cfg\\8086\\pch_3xx.xml - - -XML configuration file for the 300 series PCH -https://www.intel.com/content/www/us/en/products/docs/chipsets/300-series-chipset-pch-datasheet-vol-2.html -337348-001 - diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xxlp_orig.xmls.rst.txt similarity index 72% rename from _sources/modules/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt rename to _sources/modules/chipsec.cfg.8086.pch_3xxlp_orig.xmls.rst.txt index 2f5b216f..194e64c7 100644 --- a/_sources/modules/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.pch_3xxlp_orig.xmls.rst.txt @@ -1,7 +1,7 @@ -pch_3xxlp -============= +pch_3xxlp_orig. +=================== -Path: chipsec\\cfg\\8086\\pch_3xxlp.xml +Path: chipsec\\cfg\\8086\\pch_3xxlp_orig.xmls XML configuration file for the 300 series LP (U/Y) PCH diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt deleted file mode 100644 index b19f0764..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt +++ /dev/null @@ -1,10 +0,0 @@ -pch_3xxop -============= - -Path: chipsec\\cfg\\8086\\pch_3xxop.xml - - -XML configuration file for the 300 series On Package PCH -https://www.intel.com/content/www/us/en/products/docs/chipsets/300-series-chipset-on-package-pch-datasheet-vol-2.html -337868-002 - diff --git a/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt deleted file mode 100644 index dcab2e63..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -pch_495 -=========== - -Path: chipsec\\cfg\\8086\\pch_495.xml - - -XML configuration file for the 495 series PCH - diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt deleted file mode 100644 index caf0f7e9..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -pch_4xx -=========== - -Path: chipsec\\cfg\\8086\\pch_4xx.xml - - - XML configuration file for 4XX pch - diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt deleted file mode 100644 index 4f543111..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -pch_4xxh -============ - -Path: chipsec\\cfg\\8086\\pch_4xxh.xml - - - XML configuration file 4xxH PCH 620855 - diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xxlp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xxlp.xml.rst.txt deleted file mode 100644 index a1a6f9cb..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_4xxlp.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -pch_4xxlp -============= - -Path: chipsec\\cfg\\8086\\pch_4xxlp.xml - - - XML configuration file for the 400 series LP (U/H) PCH - diff --git a/_sources/modules/chipsec.cfg.8086.pch_5xxh.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_5xxh.xml.rst.txt deleted file mode 100644 index 717ddc4b..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_5xxh.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -pch_5xxh -============ - -Path: chipsec\\cfg\\8086\\pch_5xxh.xml - - -XML configuration file for 5XXH series pch - diff --git a/_sources/modules/chipsec.cfg.8086.pch_5xxlp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_5xxlp.xml.rst.txt index c85234dc..59b97302 100644 --- a/_sources/modules/chipsec.cfg.8086.pch_5xxlp.xml.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.pch_5xxlp.xml.rst.txt @@ -4,5 +4,5 @@ pch_5xxlp Path: chipsec\\cfg\\8086\\pch_5xxlp.xml -XML configuration file for 5XXLP series pch +XML configuration file for 5XX series pch diff --git a/_sources/modules/chipsec.cfg.8086.pch_6xxP.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_6xxP.xml.rst.txt deleted file mode 100644 index c7f32e95..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_6xxP.xml.rst.txt +++ /dev/null @@ -1,25 +0,0 @@ -pch_6xxP -============ - -Path: chipsec\\cfg\\8086\\pch_6xxP.xml - - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2021-2022, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - diff --git a/_sources/modules/chipsec.cfg.8086.pch_6xxS.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_6xxS.xml.rst.txt deleted file mode 100644 index 7f1ed154..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_6xxS.xml.rst.txt +++ /dev/null @@ -1,25 +0,0 @@ -pch_6xxS -============ - -Path: chipsec\\cfg\\8086\\pch_6xxS.xml - - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2021-2022, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - diff --git a/_sources/modules/chipsec.cfg.8086.rkl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_6xxp.xml.rst.txt similarity index 92% rename from _sources/modules/chipsec.cfg.8086.rkl.xml.rst.txt rename to _sources/modules/chipsec.cfg.8086.pch_6xxp.xml.rst.txt index 07cb507f..3f1d524f 100644 --- a/_sources/modules/chipsec.cfg.8086.rkl.xml.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.pch_6xxp.xml.rst.txt @@ -1,7 +1,7 @@ -rkl -======= +pch_6xxp +============ -Path: chipsec\\cfg\\8086\\rkl.xml +Path: chipsec\\cfg\\8086\\pch_6xxp.xml CHIPSEC: Platform Security Assessment Framework diff --git a/_sources/modules/chipsec.cfg.8086.pch_7x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_7x.xml.rst.txt deleted file mode 100644 index 232268a6..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_7x.xml.rst.txt +++ /dev/null @@ -1,25 +0,0 @@ -pch_7x -========== - -Path: chipsec\\cfg\\8086\\pch_7x.xml - - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2022, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - diff --git a/_sources/modules/chipsec.cfg.8086.pch_8x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_8x.xml.rst.txt deleted file mode 100644 index 5bf3f24b..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_8x.xml.rst.txt +++ /dev/null @@ -1,25 +0,0 @@ -pch_8x -========== - -Path: chipsec\\cfg\\8086\\pch_8x.xml - - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2022, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - diff --git a/_sources/modules/chipsec.cfg.8086.pch_c60x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_c60x.xml.rst.txt deleted file mode 100644 index bd73b9d3..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_c60x.xml.rst.txt +++ /dev/null @@ -1,11 +0,0 @@ -pch_c60x -============ - -Path: chipsec\\cfg\\8086\\pch_c60x.xml - - -XML configuration file for C600 series PCH - Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet - Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update - https://ark.intel.com/products/series/98463/Intel-C600-Series-Chipsets - diff --git a/_sources/modules/chipsec.cfg.8086.pch_c61x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_c61x.xml.rst.txt deleted file mode 100644 index 3345f3b2..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_c61x.xml.rst.txt +++ /dev/null @@ -1,10 +0,0 @@ -pch_c61x -============ - -Path: chipsec\\cfg\\8086\\pch_c61x.xml - - -XML configuration file for C610 series PCH - Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet - https://ark.intel.com/products/series/98915/Intel-C610-Series-Chipsets - diff --git a/_sources/modules/chipsec.cfg.8086.pch_c620.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_c620.xml.rst.txt deleted file mode 100644 index 8d192626..00000000 --- a/_sources/modules/chipsec.cfg.8086.pch_c620.xml.rst.txt +++ /dev/null @@ -1,11 +0,0 @@ -pch_c620 -============ - -Path: chipsec\\cfg\\8086\\pch_c620.xml - - -XML configuration file for - -* Intel(R) C620 Series Chipset Family Platform Controller Hub - https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/c620-series-chipset-datasheet.pdf - diff --git a/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt deleted file mode 100644 index bcab2341..00000000 --- a/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt +++ /dev/null @@ -1,12 +0,0 @@ -pmc_i440fx -============== - -Path: chipsec\\cfg\\8086\\pmc_i440fx.xml - - -XML configuration file for Intel 440FX PCI and Memory Controller (PMC). -It is used by QEMU "pc" machine, implemented in -https://github.com/qemu/qemu/blob/v7.0.0/hw/pci-host/i440fx.c - -A datasheet is available on https://wiki.qemu.org/File:29054901.pdf - diff --git a/_sources/modules/chipsec.cfg.8086.qrk.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.qrk.xml.rst.txt deleted file mode 100644 index db249f29..00000000 --- a/_sources/modules/chipsec.cfg.8086.qrk.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -qrk -======= - -Path: chipsec\\cfg\\8086\\qrk.xml - - -XML configuration for Quark based platforms - diff --git a/_sources/modules/chipsec.cfg.8086.rpl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.rpl.xml.rst.txt deleted file mode 100644 index 740602f6..00000000 --- a/_sources/modules/chipsec.cfg.8086.rpl.xml.rst.txt +++ /dev/null @@ -1,25 +0,0 @@ -rpl -======= - -Path: chipsec\\cfg\\8086\\rpl.xml - - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2022, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - diff --git a/_sources/modules/chipsec.cfg.8086.rst.txt b/_sources/modules/chipsec.cfg.8086.rst.txt index 743439f8..77bae596 100644 --- a/_sources/modules/chipsec.cfg.8086.rst.txt +++ b/_sources/modules/chipsec.cfg.8086.rst.txt @@ -1,56 +1,10 @@ .. toctree:: - chipsec.cfg.8086.rkl.xml.rst - chipsec.cfg.8086.ivb.xml.rst - chipsec.cfg.8086.apl.xml.rst - chipsec.cfg.8086.whl.xml.rst - chipsec.cfg.8086.dnv.xml.rst - chipsec.cfg.8086.bdw.xml.rst - chipsec.cfg.8086.hsw.xml.rst - chipsec.cfg.8086.pch_c61x.xml.rst - chipsec.cfg.8086.skl.xml.rst - chipsec.cfg.8086.common.xml.rst - chipsec.cfg.8086.pch_8x.xml.rst - chipsec.cfg.8086.iommu.xml.rst - chipsec.cfg.8086.tpm12.xml.rst - chipsec.cfg.8086.pmc_i440fx.xml.rst - chipsec.cfg.8086.pch_2xx.xml.rst - chipsec.cfg.8086.tglh.xml.rst + chipsec.cfg.8086.pch_3xxlp_orig.xmls.rst + chipsec.cfg.8086.kbl_orig.xmls.rst chipsec.cfg.8086.tglu.xml.rst chipsec.cfg.8086.kbl.xml.rst - chipsec.cfg.8086.pch_495.xml.rst - chipsec.cfg.8086.pch_6xxS.xml.rst - chipsec.cfg.8086.sfdp.xml.rst - chipsec.cfg.8086.bdx.xml.rst - chipsec.cfg.8086.hsx.xml.rst - chipsec.cfg.8086.glk.xml.rst - chipsec.cfg.8086.avn.xml.rst - chipsec.cfg.8086.byt.xml.rst - chipsec.cfg.8086.qrk.xml.rst - chipsec.cfg.8086.cht.xml.rst - chipsec.cfg.8086.cml.xml.rst - chipsec.cfg.8086.cfl.xml.rst - chipsec.cfg.8086.pch_7x.xml.rst - chipsec.cfg.8086.pch_5xxh.xml.rst - chipsec.cfg.8086.pch_4xxlp.xml.rst - chipsec.cfg.8086.pch_4xx.xml.rst + chipsec.cfg.8086.pch_6xxp.xml.rst chipsec.cfg.8086.adl.xml.rst - chipsec.cfg.8086.pch_1xx.xml.rst - chipsec.cfg.8086.snb.xml.rst - chipsec.cfg.8086.skx.xml.rst - chipsec.cfg.8086.pch_6xxP.xml.rst - chipsec.cfg.8086.txt.xml.rst - chipsec.cfg.8086.icx.xml.rst chipsec.cfg.8086.mtl.xml.rst - chipsec.cfg.8086.rpl.xml.rst - chipsec.cfg.8086.ehl.xml.rst - chipsec.cfg.8086.pch_3xx.xml.rst - chipsec.cfg.8086.pch_3xxlp.xml.rst - chipsec.cfg.8086.jkt.xml.rst - chipsec.cfg.8086.pch_c60x.xml.rst - chipsec.cfg.8086.ivt.xml.rst chipsec.cfg.8086.pch_5xxlp.xml.rst - chipsec.cfg.8086.icl.xml.rst - chipsec.cfg.8086.pch_3xxop.xml.rst - chipsec.cfg.8086.pch_c620.xml.rst - chipsec.cfg.8086.pch_4xxh.xml.rst diff --git a/_sources/modules/chipsec.cfg.8086.sfdp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.sfdp.xml.rst.txt deleted file mode 100644 index 428e5b54..00000000 --- a/_sources/modules/chipsec.cfg.8086.sfdp.xml.rst.txt +++ /dev/null @@ -1,9 +0,0 @@ -sfdp -======== - -Path: chipsec\\cfg\\8086\\sfdp.xml - - -XML configuration for Serial Flash Discoverable Parameter feature -document: https://www.jedec.org/system/files/docs/JESD216D-01.pdf - diff --git a/_sources/modules/chipsec.cfg.8086.skl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.skl.xml.rst.txt deleted file mode 100644 index 0d0a3cbb..00000000 --- a/_sources/modules/chipsec.cfg.8086.skl.xml.rst.txt +++ /dev/null @@ -1,20 +0,0 @@ -skl -======= - -Path: chipsec\\cfg\\8086\\skl.xml - - -XML configuration file for Skylake based platforms - -http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html - -* 6th Generation Intel(R) Processor Datasheet for U/Y-Platforms - -* 6th Generation Intel(R) Processor I/O Datasheet for U/Y-Platforms - -* 6th Generation Intel(R) Processor Datasheet for S-Platforms - -* 6th Generation Intel(R) Processor Datasheet for H-Platforms - -* Intel(R) 100 Series Chipset Family Platform Controller Hub (PCH) - diff --git a/_sources/modules/chipsec.cfg.8086.skx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.skx.xml.rst.txt deleted file mode 100644 index f01831ca..00000000 --- a/_sources/modules/chipsec.cfg.8086.skx.xml.rst.txt +++ /dev/null @@ -1,9 +0,0 @@ -skx -======= - -Path: chipsec\\cfg\\8086\\skx.xml - - -XML configuration file for Skylake/Purely Server -Intel (c) Xeon Processor Scalable Family datasheet Vol. 2 - diff --git a/_sources/modules/chipsec.cfg.8086.snb.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.snb.xml.rst.txt deleted file mode 100644 index 6a9f3120..00000000 --- a/_sources/modules/chipsec.cfg.8086.snb.xml.rst.txt +++ /dev/null @@ -1,8 +0,0 @@ -snb -======= - -Path: chipsec\\cfg\\8086\\snb.xml - - -XML configuration for Sandy Bridge based platforms - diff --git a/_sources/modules/chipsec.cfg.8086.tglh.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.tglh.xml.rst.txt deleted file mode 100644 index 2cdd18e9..00000000 --- a/_sources/modules/chipsec.cfg.8086.tglh.xml.rst.txt +++ /dev/null @@ -1,25 +0,0 @@ -tglh -======== - -Path: chipsec\\cfg\\8086\\tglh.xml - - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2022, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - diff --git a/_sources/modules/chipsec.cfg.8086.tpm12.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.tpm12.xml.rst.txt deleted file mode 100644 index 75bf04dd..00000000 --- a/_sources/modules/chipsec.cfg.8086.tpm12.xml.rst.txt +++ /dev/null @@ -1,25 +0,0 @@ -tpm12 -========= - -Path: chipsec\\cfg\\8086\\tpm12.xml - - -CHIPSEC: Platform Security Assessment Framework -Copyright (c) 2021, Intel Corporation - -This program is free software; you can redistribute it and/or -modify it under the terms of the GNU General Public License -as published by the Free Software Foundation; Version 2. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License -along with this program; if not, write to the Free Software -Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. - -Contact information: -chipsec@intel.com - diff --git a/_sources/modules/chipsec.cfg.8086.txt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.txt.xml.rst.txt deleted file mode 100644 index 2534899f..00000000 --- a/_sources/modules/chipsec.cfg.8086.txt.xml.rst.txt +++ /dev/null @@ -1,26 +0,0 @@ -txt -======= - -Path: chipsec\\cfg\\8086\\txt.xml - - -Configuration of Intel TXT register, following the guide: - - Intel® Trusted Execution Technology: Software Development Guide - Measured Launched Environment Developer's Guide - August 2016 - Revision 013 - -from https://web.archive.org/web/20170506220426/https://www.intel.com/content/www/us/en/software-developers/intel-txt-software-development-guide.html -(and https://usermanual.wiki/Document/inteltxtsoftwaredevelopmentguide.1721028921 ) - -Appendix B.1. (Intel® TXT Configuration Registers) details: - - These registers are mapped into two regions of memory, representing the public and private configuration spaces. - [...] - The private space registers are mapped to the address range starting at FED20000H. - The public space registers are mapped to the address range starting at FED30000H. - -As chipsec usually runs in environments where the private space is not available, -only the public space registers were described here. - diff --git a/_sources/modules/chipsec.cfg.8086.whl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.whl.xml.rst.txt deleted file mode 100644 index 64dba853..00000000 --- a/_sources/modules/chipsec.cfg.8086.whl.xml.rst.txt +++ /dev/null @@ -1,12 +0,0 @@ -whl -======= - -Path: chipsec\\cfg\\8086\\whl.xml - - -XML configuration file for Whiskey Lake - -8th Generation Intel(R) Processor Family for U-Processor Platforms: - - https://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html - - https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/300-series-chipset-on-package-pch-datasheet-vol-1.pdf - diff --git a/_sources/modules/chipsec.cfg.parsers.controls.rst.txt b/_sources/modules/chipsec.cfg.parsers.controls.rst.txt new file mode 100644 index 00000000..3239cb5c --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.controls.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.controls module +=================================== + +.. automodule:: chipsec.cfg.parsers.controls + + + diff --git a/_sources/modules/chipsec.cfg.parsers.core_parser_helper.rst.txt b/_sources/modules/chipsec.cfg.parsers.core_parser_helper.rst.txt new file mode 100644 index 00000000..e81a2288 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.core_parser_helper.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.core\_parser\_helper module +=============================================== + +.. automodule:: chipsec.cfg.parsers.core_parser_helper + + + diff --git a/_sources/modules/chipsec.cfg.parsers.locks.rst.txt b/_sources/modules/chipsec.cfg.parsers.locks.rst.txt new file mode 100644 index 00000000..a11440b3 --- /dev/null +++ b/_sources/modules/chipsec.cfg.parsers.locks.rst.txt @@ -0,0 +1,7 @@ +chipsec.cfg.parsers.locks module +================================ + +.. automodule:: chipsec.cfg.parsers.locks + + + diff --git a/_sources/modules/chipsec.hal.acpi.rst.txt b/_sources/modules/chipsec.hal.acpi.rst.txt deleted file mode 100644 index ef9af18a..00000000 --- a/_sources/modules/chipsec.hal.acpi.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.acpi module -======================= - -.. automodule:: chipsec.hal.acpi - - - diff --git a/_sources/modules/chipsec.hal.acpi_tables.rst.txt b/_sources/modules/chipsec.hal.acpi_tables.rst.txt deleted file mode 100644 index d28ff783..00000000 --- a/_sources/modules/chipsec.hal.acpi_tables.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.acpi\_tables module -=============================== - -.. automodule:: chipsec.hal.acpi_tables - - - diff --git a/_sources/modules/chipsec.hal.cmos.rst.txt b/_sources/modules/chipsec.hal.cmos.rst.txt deleted file mode 100644 index 81853dea..00000000 --- a/_sources/modules/chipsec.hal.cmos.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.cmos module -======================= - -.. automodule:: chipsec.hal.cmos - - - diff --git a/_sources/modules/chipsec.hal.cpu.rst.txt b/_sources/modules/chipsec.hal.cpu.rst.txt deleted file mode 100644 index f358f82c..00000000 --- a/_sources/modules/chipsec.hal.cpu.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.cpu module -====================== - -.. automodule:: chipsec.hal.cpu - - - diff --git a/_sources/modules/chipsec.hal.cpuid.rst.txt b/_sources/modules/chipsec.hal.cpuid.rst.txt deleted file mode 100644 index aa02e29e..00000000 --- a/_sources/modules/chipsec.hal.cpuid.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.cpuid module -======================== - -.. automodule:: chipsec.hal.cpuid - - - diff --git a/_sources/modules/chipsec.hal.ec.rst.txt b/_sources/modules/chipsec.hal.ec.rst.txt deleted file mode 100644 index e52f7f55..00000000 --- a/_sources/modules/chipsec.hal.ec.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.ec module -===================== - -.. automodule:: chipsec.hal.ec - - - diff --git a/_sources/modules/chipsec.hal.hals.rst.txt b/_sources/modules/chipsec.hal.hals.rst.txt new file mode 100644 index 00000000..0113efd8 --- /dev/null +++ b/_sources/modules/chipsec.hal.hals.rst.txt @@ -0,0 +1,7 @@ +chipsec.hal.hals module +======================= + +.. automodule:: chipsec.hal.hals + + + diff --git a/_sources/modules/chipsec.hal.igd.rst.txt b/_sources/modules/chipsec.hal.igd.rst.txt deleted file mode 100644 index 94e1ad27..00000000 --- a/_sources/modules/chipsec.hal.igd.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.igd module -====================== - -.. automodule:: chipsec.hal.igd - - - diff --git a/_sources/modules/chipsec.hal.interrupts.rst.txt b/_sources/modules/chipsec.hal.interrupts.rst.txt deleted file mode 100644 index 2db95aae..00000000 --- a/_sources/modules/chipsec.hal.interrupts.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.interrupts module -============================= - -.. automodule:: chipsec.hal.interrupts - - - diff --git a/_sources/modules/chipsec.hal.io.rst.txt b/_sources/modules/chipsec.hal.io.rst.txt deleted file mode 100644 index f9adfd95..00000000 --- a/_sources/modules/chipsec.hal.io.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.io module -===================== - -.. automodule:: chipsec.hal.io - - - diff --git a/_sources/modules/chipsec.hal.iobar.rst.txt b/_sources/modules/chipsec.hal.iobar.rst.txt deleted file mode 100644 index 147dfb0b..00000000 --- a/_sources/modules/chipsec.hal.iobar.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.iobar module -======================== - -.. automodule:: chipsec.hal.iobar - - - diff --git a/_sources/modules/chipsec.hal.iommu.rst.txt b/_sources/modules/chipsec.hal.iommu.rst.txt deleted file mode 100644 index 6231370c..00000000 --- a/_sources/modules/chipsec.hal.iommu.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.iommu module -======================== - -.. automodule:: chipsec.hal.iommu - - - diff --git a/_sources/modules/chipsec.hal.locks.rst.txt b/_sources/modules/chipsec.hal.locks.rst.txt deleted file mode 100644 index 62ff8d3a..00000000 --- a/_sources/modules/chipsec.hal.locks.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.locks module -======================== - -.. automodule:: chipsec.hal.locks - - - diff --git a/_sources/modules/chipsec.hal.mmio.rst.txt b/_sources/modules/chipsec.hal.mmio.rst.txt deleted file mode 100644 index fa5bfdc3..00000000 --- a/_sources/modules/chipsec.hal.mmio.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.mmio module -======================= - -.. automodule:: chipsec.hal.mmio - - - diff --git a/_sources/modules/chipsec.hal.msgbus.rst.txt b/_sources/modules/chipsec.hal.msgbus.rst.txt deleted file mode 100644 index 0e1ff77a..00000000 --- a/_sources/modules/chipsec.hal.msgbus.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.msgbus module -========================= - -.. automodule:: chipsec.hal.msgbus - - - diff --git a/_sources/modules/chipsec.hal.msr.rst.txt b/_sources/modules/chipsec.hal.msr.rst.txt deleted file mode 100644 index 507e272e..00000000 --- a/_sources/modules/chipsec.hal.msr.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.msr module -====================== - -.. automodule:: chipsec.hal.msr - - - diff --git a/_sources/modules/chipsec.hal.paging.rst.txt b/_sources/modules/chipsec.hal.paging.rst.txt deleted file mode 100644 index 752b2201..00000000 --- a/_sources/modules/chipsec.hal.paging.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.paging module -========================= - -.. automodule:: chipsec.hal.paging - - - diff --git a/_sources/modules/chipsec.hal.pci.rst.txt b/_sources/modules/chipsec.hal.pci.rst.txt deleted file mode 100644 index 904ffd1a..00000000 --- a/_sources/modules/chipsec.hal.pci.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.pci module -====================== - -.. automodule:: chipsec.hal.pci - - - diff --git a/_sources/modules/chipsec.hal.pcidb.rst.txt b/_sources/modules/chipsec.hal.pcidb.rst.txt deleted file mode 100644 index 1572e35b..00000000 --- a/_sources/modules/chipsec.hal.pcidb.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.pcidb module -======================== - -.. automodule:: chipsec.hal.pcidb - - - diff --git a/_sources/modules/chipsec.hal.physmem.rst.txt b/_sources/modules/chipsec.hal.physmem.rst.txt deleted file mode 100644 index 22424b69..00000000 --- a/_sources/modules/chipsec.hal.physmem.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.physmem module -========================== - -.. automodule:: chipsec.hal.physmem - - - diff --git a/_sources/modules/chipsec.hal.psp.rst.txt b/_sources/modules/chipsec.hal.psp.rst.txt deleted file mode 100644 index e10298d7..00000000 --- a/_sources/modules/chipsec.hal.psp.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.psp module -====================== - -.. automodule:: chipsec.hal.psp - - - diff --git a/_sources/modules/chipsec.hal.rst.txt b/_sources/modules/chipsec.hal.rst.txt index 903f3efa..361bad40 100644 --- a/_sources/modules/chipsec.hal.rst.txt +++ b/_sources/modules/chipsec.hal.rst.txt @@ -4,46 +4,8 @@ chipsec.hal package .. toctree:: :maxdepth: 10 - chipsec.hal.acpi - chipsec.hal.acpi_tables - chipsec.hal.cmos - chipsec.hal.cpu - chipsec.hal.cpuid - chipsec.hal.ec chipsec.hal.hal_base - chipsec.hal.igd - chipsec.hal.interrupts - chipsec.hal.io - chipsec.hal.iobar - chipsec.hal.iommu - chipsec.hal.locks - chipsec.hal.mmio - chipsec.hal.msgbus - chipsec.hal.msr - chipsec.hal.paging - chipsec.hal.pci - chipsec.hal.pcidb - chipsec.hal.physmem - chipsec.hal.psp - chipsec.hal.smbios - chipsec.hal.smbus - chipsec.hal.spd - chipsec.hal.spi - chipsec.hal.spi_descriptor - chipsec.hal.spi_jedec_ids - chipsec.hal.spi_uefi - chipsec.hal.tpm - chipsec.hal.tpm_eventlog - chipsec.hal.tpm_interface - chipsec.hal.ucode - chipsec.hal.uefi - chipsec.hal.uefi_common - chipsec.hal.uefi_compression - chipsec.hal.uefi_fv - chipsec.hal.uefi_platform - chipsec.hal.uefi_search - chipsec.hal.virtmem - chipsec.hal.vmm + chipsec.hal.hals .. automodule:: chipsec.hal diff --git a/_sources/modules/chipsec.hal.smbios.rst.txt b/_sources/modules/chipsec.hal.smbios.rst.txt deleted file mode 100644 index 1554ccea..00000000 --- a/_sources/modules/chipsec.hal.smbios.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.smbios module -========================= - -.. automodule:: chipsec.hal.smbios - - - diff --git a/_sources/modules/chipsec.hal.smbus.rst.txt b/_sources/modules/chipsec.hal.smbus.rst.txt deleted file mode 100644 index 5f12770b..00000000 --- a/_sources/modules/chipsec.hal.smbus.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.smbus module -======================== - -.. automodule:: chipsec.hal.smbus - - - diff --git a/_sources/modules/chipsec.hal.spd.rst.txt b/_sources/modules/chipsec.hal.spd.rst.txt deleted file mode 100644 index 2f55544d..00000000 --- a/_sources/modules/chipsec.hal.spd.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.spd module -====================== - -.. automodule:: chipsec.hal.spd - - - diff --git a/_sources/modules/chipsec.hal.spi.rst.txt b/_sources/modules/chipsec.hal.spi.rst.txt deleted file mode 100644 index 6f29674c..00000000 --- a/_sources/modules/chipsec.hal.spi.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.spi module -====================== - -.. automodule:: chipsec.hal.spi - - - diff --git a/_sources/modules/chipsec.hal.spi_descriptor.rst.txt b/_sources/modules/chipsec.hal.spi_descriptor.rst.txt deleted file mode 100644 index 4734df19..00000000 --- a/_sources/modules/chipsec.hal.spi_descriptor.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.spi\_descriptor module -================================== - -.. automodule:: chipsec.hal.spi_descriptor - - - diff --git a/_sources/modules/chipsec.hal.spi_jedec_ids.rst.txt b/_sources/modules/chipsec.hal.spi_jedec_ids.rst.txt deleted file mode 100644 index 15144b3f..00000000 --- a/_sources/modules/chipsec.hal.spi_jedec_ids.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.spi\_jedec\_ids module -================================== - -.. automodule:: chipsec.hal.spi_jedec_ids - - - diff --git a/_sources/modules/chipsec.hal.spi_uefi.rst.txt b/_sources/modules/chipsec.hal.spi_uefi.rst.txt deleted file mode 100644 index ec5c851c..00000000 --- a/_sources/modules/chipsec.hal.spi_uefi.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.spi\_uefi module -============================ - -.. automodule:: chipsec.hal.spi_uefi - - - diff --git a/_sources/modules/chipsec.hal.tpm.rst.txt b/_sources/modules/chipsec.hal.tpm.rst.txt deleted file mode 100644 index 4abc1cb1..00000000 --- a/_sources/modules/chipsec.hal.tpm.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.tpm module -====================== - -.. automodule:: chipsec.hal.tpm - - - diff --git a/_sources/modules/chipsec.hal.tpm_eventlog.rst.txt b/_sources/modules/chipsec.hal.tpm_eventlog.rst.txt deleted file mode 100644 index 01d4039b..00000000 --- a/_sources/modules/chipsec.hal.tpm_eventlog.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.tpm\_eventlog module -================================ - -.. automodule:: chipsec.hal.tpm_eventlog - - - diff --git a/_sources/modules/chipsec.hal.tpm_interface.rst.txt b/_sources/modules/chipsec.hal.tpm_interface.rst.txt deleted file mode 100644 index c31d51b1..00000000 --- a/_sources/modules/chipsec.hal.tpm_interface.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.tpm\_interface module -================================= - -.. automodule:: chipsec.hal.tpm_interface - - - diff --git a/_sources/modules/chipsec.hal.ucode.rst.txt b/_sources/modules/chipsec.hal.ucode.rst.txt deleted file mode 100644 index 7258208d..00000000 --- a/_sources/modules/chipsec.hal.ucode.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.ucode module -======================== - -.. automodule:: chipsec.hal.ucode - - - diff --git a/_sources/modules/chipsec.hal.uefi.rst.txt b/_sources/modules/chipsec.hal.uefi.rst.txt deleted file mode 100644 index e11dfd4f..00000000 --- a/_sources/modules/chipsec.hal.uefi.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.uefi module -======================= - -.. automodule:: chipsec.hal.uefi - - - diff --git a/_sources/modules/chipsec.hal.uefi_common.rst.txt b/_sources/modules/chipsec.hal.uefi_common.rst.txt deleted file mode 100644 index fad89884..00000000 --- a/_sources/modules/chipsec.hal.uefi_common.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.uefi\_common module -=============================== - -.. automodule:: chipsec.hal.uefi_common - - - diff --git a/_sources/modules/chipsec.hal.uefi_compression.rst.txt b/_sources/modules/chipsec.hal.uefi_compression.rst.txt deleted file mode 100644 index a7565c64..00000000 --- a/_sources/modules/chipsec.hal.uefi_compression.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.uefi\_compression module -==================================== - -.. automodule:: chipsec.hal.uefi_compression - - - diff --git a/_sources/modules/chipsec.hal.uefi_fv.rst.txt b/_sources/modules/chipsec.hal.uefi_fv.rst.txt deleted file mode 100644 index b6ce1682..00000000 --- a/_sources/modules/chipsec.hal.uefi_fv.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.uefi\_fv module -=========================== - -.. automodule:: chipsec.hal.uefi_fv - - - diff --git a/_sources/modules/chipsec.hal.uefi_platform.rst.txt b/_sources/modules/chipsec.hal.uefi_platform.rst.txt deleted file mode 100644 index 39f01de2..00000000 --- a/_sources/modules/chipsec.hal.uefi_platform.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.uefi\_platform module -================================= - -.. automodule:: chipsec.hal.uefi_platform - - - diff --git a/_sources/modules/chipsec.hal.uefi_search.rst.txt b/_sources/modules/chipsec.hal.uefi_search.rst.txt deleted file mode 100644 index a91b4b10..00000000 --- a/_sources/modules/chipsec.hal.uefi_search.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.uefi\_search module -=============================== - -.. automodule:: chipsec.hal.uefi_search - - - diff --git a/_sources/modules/chipsec.hal.virtmem.rst.txt b/_sources/modules/chipsec.hal.virtmem.rst.txt deleted file mode 100644 index 4ec42f14..00000000 --- a/_sources/modules/chipsec.hal.virtmem.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.virtmem module -========================== - -.. automodule:: chipsec.hal.virtmem - - - diff --git a/_sources/modules/chipsec.hal.vmm.rst.txt b/_sources/modules/chipsec.hal.vmm.rst.txt deleted file mode 100644 index 22b2497c..00000000 --- a/_sources/modules/chipsec.hal.vmm.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.hal.vmm module -====================== - -.. automodule:: chipsec.hal.vmm - - - diff --git a/_sources/modules/chipsec.library.acpi_tables.rst.txt b/_sources/modules/chipsec.library.acpi_tables.rst.txt new file mode 100644 index 00000000..5407dac5 --- /dev/null +++ b/_sources/modules/chipsec.library.acpi_tables.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.acpi\_tables module +=================================== + +.. automodule:: chipsec.library.acpi_tables + + + diff --git a/_sources/modules/chipsec.library.cpu.rst.txt b/_sources/modules/chipsec.library.cpu.rst.txt new file mode 100644 index 00000000..87d180d2 --- /dev/null +++ b/_sources/modules/chipsec.library.cpu.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.cpu module +========================== + +.. automodule:: chipsec.library.cpu + + + diff --git a/_sources/modules/chipsec.library.display.rst.txt b/_sources/modules/chipsec.library.display.rst.txt new file mode 100644 index 00000000..0ba21785 --- /dev/null +++ b/_sources/modules/chipsec.library.display.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.display module +============================== + +.. automodule:: chipsec.library.display + + + diff --git a/_sources/modules/chipsec.library.paging.rst.txt b/_sources/modules/chipsec.library.paging.rst.txt new file mode 100644 index 00000000..c812efc8 --- /dev/null +++ b/_sources/modules/chipsec.library.paging.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.paging module +============================= + +.. automodule:: chipsec.library.paging + + + diff --git a/_sources/modules/chipsec.library.pci.rst.txt b/_sources/modules/chipsec.library.pci.rst.txt new file mode 100644 index 00000000..7eb42b8a --- /dev/null +++ b/_sources/modules/chipsec.library.pci.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.pci module +========================== + +.. automodule:: chipsec.library.pci + + + diff --git a/_sources/modules/chipsec.library.pcidb.rst.txt b/_sources/modules/chipsec.library.pcidb.rst.txt new file mode 100644 index 00000000..f8ad25da --- /dev/null +++ b/_sources/modules/chipsec.library.pcidb.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.pcidb module +============================ + +.. automodule:: chipsec.library.pcidb + + + diff --git a/_sources/modules/chipsec.library.spi_jedec_ids.rst.txt b/_sources/modules/chipsec.library.spi_jedec_ids.rst.txt new file mode 100644 index 00000000..abe8921d --- /dev/null +++ b/_sources/modules/chipsec.library.spi_jedec_ids.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.spi\_jedec\_ids module +====================================== + +.. automodule:: chipsec.library.spi_jedec_ids + + + diff --git a/_sources/modules/chipsec.library.tpm12_commands.rst.txt b/_sources/modules/chipsec.library.tpm12_commands.rst.txt new file mode 100644 index 00000000..18c42155 --- /dev/null +++ b/_sources/modules/chipsec.library.tpm12_commands.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.tpm12\_commands module +====================================== + +.. automodule:: chipsec.library.tpm12_commands + + + diff --git a/_sources/modules/chipsec.library.tpm_eventlog.rst.txt b/_sources/modules/chipsec.library.tpm_eventlog.rst.txt new file mode 100644 index 00000000..6ed7800d --- /dev/null +++ b/_sources/modules/chipsec.library.tpm_eventlog.rst.txt @@ -0,0 +1,7 @@ +chipsec.library.tpm\_eventlog module +==================================== + +.. automodule:: chipsec.library.tpm_eventlog + + + diff --git a/_sources/modules/chipsec.modules.hsw.rst.txt b/_sources/modules/chipsec.modules.hsw.rst.txt deleted file mode 100644 index 6b9e9193..00000000 --- a/_sources/modules/chipsec.modules.hsw.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.modules.hsw package -=========================== - -.. automodule:: chipsec.modules.hsw - - - diff --git a/_sources/modules/chipsec.modules.ivb.rst.txt b/_sources/modules/chipsec.modules.ivb.rst.txt deleted file mode 100644 index 6868af01..00000000 --- a/_sources/modules/chipsec.modules.ivb.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.modules.ivb package -=========================== - -.. automodule:: chipsec.modules.ivb - - - diff --git a/_sources/modules/chipsec.modules.rst.txt b/_sources/modules/chipsec.modules.rst.txt index 81b33b1a..722c0944 100644 --- a/_sources/modules/chipsec.modules.rst.txt +++ b/_sources/modules/chipsec.modules.rst.txt @@ -7,9 +7,6 @@ chipsec.modules package chipsec.modules.bdw chipsec.modules.byt chipsec.modules.common - chipsec.modules.hsw - chipsec.modules.ivb - chipsec.modules.snb chipsec.modules.tools .. automodule:: chipsec.modules diff --git a/_sources/modules/chipsec.modules.snb.rst.txt b/_sources/modules/chipsec.modules.snb.rst.txt deleted file mode 100644 index d5ad9240..00000000 --- a/_sources/modules/chipsec.modules.snb.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.modules.snb package -=========================== - -.. automodule:: chipsec.modules.snb - - - diff --git a/_sources/modules/chipsec.utilcmd.hals_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.hals_cmd.rst.txt new file mode 100644 index 00000000..5a16f5fc --- /dev/null +++ b/_sources/modules/chipsec.utilcmd.hals_cmd.rst.txt @@ -0,0 +1,7 @@ +chipsec.utilcmd.hals\_cmd module +================================ + +.. automodule:: chipsec.utilcmd.hals_cmd + + + diff --git a/_sources/modules/chipsec.utilcmd.mm_msgbus_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.mm_msgbus_cmd.rst.txt new file mode 100644 index 00000000..fe8fad59 --- /dev/null +++ b/_sources/modules/chipsec.utilcmd.mm_msgbus_cmd.rst.txt @@ -0,0 +1,7 @@ +chipsec.utilcmd.mm\_msgbus\_cmd module +====================================== + +.. automodule:: chipsec.utilcmd.mm_msgbus_cmd + + + diff --git a/_sources/modules/chipsec.utilcmd.rst.txt b/_sources/modules/chipsec.utilcmd.rst.txt index 565bf35d..869582f3 100644 --- a/_sources/modules/chipsec.utilcmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.rst.txt @@ -13,12 +13,14 @@ chipsec.utilcmd package chipsec.utilcmd.deltas_cmd chipsec.utilcmd.desc_cmd chipsec.utilcmd.ec_cmd + chipsec.utilcmd.hals_cmd chipsec.utilcmd.igd_cmd chipsec.utilcmd.interrupts_cmd chipsec.utilcmd.io_cmd chipsec.utilcmd.iommu_cmd chipsec.utilcmd.lock_check_cmd chipsec.utilcmd.mem_cmd + chipsec.utilcmd.mm_msgbus_cmd chipsec.utilcmd.mmcfg_base_cmd chipsec.utilcmd.mmcfg_cmd chipsec.utilcmd.mmio_cmd diff --git a/contribution/code-style-python.html b/contribution/code-style-python.html index 66419c6b..98cf08d7 100644 --- a/contribution/code-style-python.html +++ b/contribution/code-style-python.html @@ -616,7 +616,7 @@

Navigation

diff --git a/contribution/sphinx.html b/contribution/sphinx.html index caa30d8d..757eeec7 100644 --- a/contribution/sphinx.html +++ b/contribution/sphinx.html @@ -156,7 +156,7 @@

Navigation

diff --git a/development/Architecture-Overview.html b/development/Architecture-Overview.html index a12f2b79..ae912dda 100644 --- a/development/Architecture-Overview.html +++ b/development/Architecture-Overview.html @@ -125,12 +125,14 @@

Commands
  • chipsec.utilcmd.deltas_cmd module
  • chipsec.utilcmd.desc_cmd module
  • chipsec.utilcmd.ec_cmd module
    • +
  • chipsec.utilcmd.hals_cmd module
  • chipsec.utilcmd.igd_cmd module
  • chipsec.utilcmd.interrupts_cmd module
  • chipsec.utilcmd.io_cmd module
  • chipsec.utilcmd.iommu_cmd module
  • chipsec.utilcmd.lock_check_cmd module
  • chipsec.utilcmd.mem_cmd module
    • +
  • chipsec.utilcmd.mm_msgbus_cmd module
  • chipsec.utilcmd.mmcfg_base_cmd module
  • chipsec.utilcmd.mmcfg_cmd module
  • chipsec.utilcmd.mmio_cmd module
    • @@ -161,46 +163,8 @@

    HAL (Hardware Abstraction Layer) @@ -363,7 +327,7 @@

    Navigation

    diff --git a/development/Configuration-Files.html b/development/Configuration-Files.html index ce916d49..4d3273bd 100644 --- a/development/Configuration-Files.html +++ b/development/Configuration-Files.html @@ -88,60 +88,14 @@

    Configuration File Example

    @@ -244,7 +198,7 @@

    Navigation

    diff --git a/development/Developing.html b/development/Developing.html index ed9f7f08..da7e463b 100644 --- a/development/Developing.html +++ b/development/Developing.html @@ -17,7 +17,7 @@ - + diff --git a/development/Sample-Module-Code.html b/development/Sample-Module-Code.html index 7ab89c84..8bb7bdf2 100644 --- a/development/Sample-Module-Code.html +++ b/development/Sample-Module-Code.html @@ -172,7 +172,7 @@

    Navigation

    diff --git a/development/Sample-Util-Command.html b/development/Sample-Util-Command.html index 1cd88c78..f08dbf25 100644 --- a/development/Sample-Util-Command.html +++ b/development/Sample-Util-Command.html @@ -175,7 +175,7 @@

    Navigation

    diff --git a/development/Vulnerabilities-and-CHIPSEC-Modules.html b/development/Vulnerabilities-and-CHIPSEC-Modules.html index a6a1d6af..f0b38406 100644 --- a/development/Vulnerabilities-and-CHIPSEC-Modules.html +++ b/development/Vulnerabilities-and-CHIPSEC-Modules.html @@ -490,9 +490,6 @@

    Modules
  • chipsec.modules.common.spi_lock module
    • -
  • chipsec.modules.hsw package
    • -
  • chipsec.modules.ivb package
    • -
  • chipsec.modules.snb package
  • chipsec.modules.tools package
    • chipsec.modules.tools.cpu package diff --git a/genindex.html b/genindex.html index 953c5271..ad011726 100644 --- a/genindex.html +++ b/genindex.html @@ -47,66 +47,45 @@

      C

      - +
      • - chipsec.fuzzing - -
        • -
      • - chipsec.fuzzing.primitives + chipsec.cfg.parsers.controls
      • - chipsec.hal + chipsec.cfg.parsers.core_parser_helper
      • - chipsec.hal.acpi + chipsec.cfg.parsers.locks
      • - chipsec.hal.acpi_tables - -
        • -
      • - chipsec.hal.cmos - -
        • -
      • - chipsec.hal.cpu + chipsec.fuzzing
      • - chipsec.hal.cpuid + chipsec.fuzzing.primitives
      • - chipsec.hal.ec + chipsec.hal
      • @@ -117,346 +96,185 @@

        C

    • - chipsec.hal.igd - -
      • -
    • - chipsec.hal.interrupts - -
      • -
    • - chipsec.hal.io - -
      • -
    • - chipsec.hal.iobar - -
      • -
    • - chipsec.hal.iommu - -
      • -
    • - chipsec.hal.locks - -
      • -
    • - chipsec.hal.mmio - -
      • -
    • - chipsec.hal.msgbus - -
      • -
    • - chipsec.hal.msr - -
      • -
    • - chipsec.hal.paging - -
      • -
    • - chipsec.hal.pci - -
      • -
    • - chipsec.hal.pcidb - -
      • -
    • - chipsec.hal.physmem - -
      • -
    • - chipsec.hal.psp + chipsec.hal.hals
    • - chipsec.hal.smbios - -
      • -
    • - chipsec.hal.smbus - -
      • -
    • - chipsec.hal.spd - -
      • -
    • - chipsec.hal.spi - -
      • -
    • - chipsec.hal.spi_descriptor - -
      • -
    • - chipsec.hal.spi_jedec_ids - -
      • -
    • - chipsec.hal.spi_uefi - -
      • -
    • - chipsec.hal.tpm - -
      • -
    • - chipsec.hal.tpm_eventlog - -
      • -
    • - chipsec.hal.tpm_interface - -
      • -
    • - chipsec.hal.ucode + chipsec.helper
    • - chipsec.hal.uefi + chipsec.helper.basehelper
    • - chipsec.hal.uefi_common + chipsec.helper.dal
    • - chipsec.hal.uefi_compression + chipsec.helper.dal.dalhelper
    • - chipsec.hal.uefi_fv + chipsec.helper.efi
    • - chipsec.hal.uefi_platform + chipsec.helper.efi.efihelper
    • - chipsec.hal.uefi_search + chipsec.helper.linux
    • - chipsec.hal.virtmem + chipsec.helper.linux.linuxhelper
    • - chipsec.hal.vmm + chipsec.helper.linuxnative
    • - chipsec.helper + chipsec.helper.linuxnative.cpuid
    • - chipsec.helper.basehelper + chipsec.helper.linuxnative.legacy_pci
    • - chipsec.helper.dal + chipsec.helper.linuxnative.linuxnativehelper
    • - chipsec.helper.dal.dalhelper + chipsec.helper.nonehelper
    • - chipsec.helper.efi + chipsec.helper.oshelper
    • - chipsec.helper.efi.efihelper + chipsec.helper.windows
    • - chipsec.helper.linux + chipsec.library.acpi_tables
    • - chipsec.helper.linux.linuxhelper + chipsec.library.cpu
    • - chipsec.helper.linuxnative + chipsec.library.display
    • - chipsec.helper.linuxnative.cpuid + chipsec.library.gil
    • - chipsec.helper.linuxnative.legacy_pci + chipsec.library.paging
    • - chipsec.helper.linuxnative.linuxnativehelper + chipsec.library.pci
    • - chipsec.helper.nonehelper + chipsec.library.pcidb
    • - chipsec.helper.oshelper + chipsec.library.spi_jedec_ids
    • - chipsec.helper.windows + chipsec.library.tpm12_commands
    • - chipsec.library.gil + chipsec.library.tpm_eventlog
    • @@ -669,8 +487,6 @@

      C

    • module
      • -
      • chipsec.modules.common.smm_lock @@ -713,6 +529,8 @@

        C

      • module
      +       		@@ -40,8 +40,8 @@

      Navigation

      -
      -

      CHIPSEC 1.13.19

      +
      +

      CHIPSEC 2.0.0-rc5

      CHIPSEC is a framework for analyzing platform level security of hardware, devices, system firmware, low-level protection mechanisms, and the configuration of various platform components.

      @@ -227,11 +227,11 @@

      Navigation

      next |
    • CHIPSEC documentation »
      • -
    • CHIPSEC 1.13.19
      • +
    • CHIPSEC 2.0.0-rc5
      • diff --git a/installation/InstallLinux.html b/installation/InstallLinux.html index 4556937b..5b073290 100644 --- a/installation/InstallLinux.html +++ b/installation/InstallLinux.html @@ -225,7 +225,7 @@

      Navigation

      diff --git a/installation/InstallWinDAL.html b/installation/InstallWinDAL.html index 22e8987d..e2600fba 100644 --- a/installation/InstallWinDAL.html +++ b/installation/InstallWinDAL.html @@ -163,7 +163,7 @@

      Navigation

      diff --git a/installation/InstallWindows.html b/installation/InstallWindows.html index 5768fe39..1508a8ce 100644 --- a/installation/InstallWindows.html +++ b/installation/InstallWindows.html @@ -423,7 +423,7 @@

      Navigation

      diff --git a/installation/USBwithUEFIShell.html b/installation/USBwithUEFIShell.html index 1e3b0552..47b77eb7 100644 --- a/installation/USBwithUEFIShell.html +++ b/installation/USBwithUEFIShell.html @@ -251,7 +251,7 @@

      Navigation

      diff --git a/modules/chipsec.cfg.8086.adl.xml.html b/modules/chipsec.cfg.8086.adl.xml.html index cb56edbe..6957fc42 100644 --- a/modules/chipsec.cfg.8086.adl.xml.html +++ b/modules/chipsec.cfg.8086.adl.xml.html @@ -16,8 +16,8 @@ - - + + diff --git a/modules/chipsec.cfg.8086.apl.xml.html b/modules/chipsec.cfg.8086.apl.xml.html deleted file mode 100644 index 8c85822b..00000000 --- a/modules/chipsec.cfg.8086.apl.xml.html +++ /dev/null @@ -1,159 +0,0 @@ - - - - - - - - apl — CHIPSEC documentation - - - - - - - - - - - - - - - -
      -
      -
      -
      - -
      -

      apl

      -

      Path: chipsec\cfg\8086\apl.xml

      -

      XML configuration for Apollo Lake based SoCs -document id 334818/334819

      -
      - - -
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      Path: chipsec\cfg\8086\avn.xml

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      XML configuration for Avoton based platforms

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      bdx

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      Path: chipsec\cfg\8086\bdx.xml

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      XML configuration file for Broadwell Server based platforms -Intel (c) Xeon Processor E5 v4 Product Family datasheet Vol. 2 -Intel (c) Xeon Processor E7 v4 Product Family datasheet Vol. 2 -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update -Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet

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      Path: chipsec\cfg\8086\byt.xml

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      XML configuration for Bay Trail based platforms

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      XML configuration file for Coffee Lake

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      Path: chipsec\cfg\8086\cht.xml

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      XML configuration for Cherry Trail and Braswell SoCs

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      cml

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      Path: chipsec\cfg\8086\cml.xml

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      XML configuration file for Comet Lake

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      common

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      Path: chipsec\cfg\8086\common.xml

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      Common (default) XML platform configuration file

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      dnv

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      Path: chipsec\cfg\8086\dnv.xml

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      XML configuration file for Denverton

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      ehl

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      Path: chipsec\cfg\8086\ehl.xml

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      XML configuration file for Elkhart Lake -Document ID: 635255, 636112, 636722, 636723

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      - - - - \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.glk.xml.html b/modules/chipsec.cfg.8086.glk.xml.html deleted file mode 100644 index 944cf58d..00000000 --- a/modules/chipsec.cfg.8086.glk.xml.html +++ /dev/null @@ -1,163 +0,0 @@ - - - - - - - - glk — CHIPSEC documentation - - - - - - - - - - - - - - - -
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      glk

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      Path: chipsec\cfg\8086\glk.xml

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      XML configuration for GLK

      Document ID: 336561-001

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      hsw

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      Path: chipsec\cfg\8086\hsw.xml

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      XML configuration file for Haswell based platforms

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      hsx

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      Path: chipsec\cfg\8086\hsx.xml

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      XML configuration file for Haswell Server based platforms -Intel (c) Xeon Processor E5-1600/2400/2600/4600 v3 Product Family datasheet Vol. 2 -Intel (c) Xeon Processor E7-8800/4800 v3 Product Family datasheet Vol. 2 -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet -Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update -Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet

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      Next topic

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      rkl

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      pch_3xxlp_orig.