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Commit 4d803d0

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author
mean
committed
work + update swlink
1 parent d03af56 commit 4d803d0

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4 files changed

+32
-19
lines changed

4 files changed

+32
-19
lines changed

cross-file/swlink-riscv.ini

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -19,8 +19,8 @@ cpu = 'arm'
1919
endian = 'little'
2020

2121
[project options]
22-
probe = 'native'
23-
targets = 'riscv32,riscv64,gd32,rp,ch32v'
22+
probe = 'swlink'
23+
targets = 'riscv32,riscv64,gd32,ch32v'
2424
rtt_support = false
25-
bmd_bootloader = true
25+
bmd_bootloader = false
2626
rvswd_support = true

src/platforms/common/rvswdptap.c

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -39,13 +39,22 @@ static bool rv_end_frame(uint32_t *status);
3939
{ \
4040
gpio_clear(SWCLK_PORT, SWCLK_PIN); \
4141
for (volatile uint32_t counter = target_clk_divider + 1; counter > 0; --counter) \
42-
continue; \
42+
__asm__("nop"); \
4343
}
4444
#define CLK_ON() \
4545
{ \
4646
gpio_set(SWCLK_PORT, SWCLK_PIN); \
4747
for (volatile uint32_t counter = target_clk_divider + 1; counter > 0; --counter) \
48-
continue; \
48+
__asm__("nop"); \
49+
}
50+
51+
#define IO_OFF() \
52+
{ \
53+
gpio_clear(SWDIO_PORT, SWDIO_PIN); \
54+
}
55+
#define IO_ON() \
56+
{ \
57+
gpio_set(SWDIO_PORT, SWDIO_PIN); \
4958
}
5059

5160
static void rv_write_nbits(int n, uint32_t value)
@@ -54,7 +63,10 @@ static void rv_write_nbits(int n, uint32_t value)
5463
const uint32_t mask = 0x80000000UL;
5564
for (int i = 0; i < n; i++) {
5665
CLK_OFF();
57-
gpio_set_val(SWDIO_PORT, SWDIO_PIN, value & mask);
66+
if (value & mask)
67+
IO_ON()
68+
else
69+
IO_OFF();
5870
CLK_ON();
5971
value <<= 1;
6072
}
@@ -63,16 +75,16 @@ static void rv_write_nbits(int n, uint32_t value)
6375
static void rv_start_bit(void)
6476
{
6577
SWDIO_MODE_DRIVE();
66-
gpio_clear(SWDIO_PORT, SWDIO_PIN);
78+
IO_OFF();
6779
}
6880

6981
static void rv_stop_bit(void)
7082
{
7183
CLK_OFF();
7284
SWDIO_MODE_DRIVE();
73-
gpio_clear(SWDIO_PORT, SWDIO_PIN);
85+
IO_OFF();
7486
CLK_ON();
75-
gpio_set(SWDIO_PORT, SWDIO_PIN);
87+
IO_ON();
7688
}
7789

7890
static uint32_t rv_read_nbits(int n)
@@ -82,7 +94,7 @@ static uint32_t rv_read_nbits(int n)
8294
for (int i = 0; i < n; i++) {
8395
CLK_OFF();
8496
CLK_ON();
85-
out = (out << 1) + gpio_get(SWDIO_IN_PORT, SWDIO_IN_PIN); // read bit on rising edge
97+
out = (out << 1) + (!!gpio_get(SWDIO_IN_PORT, SWDIO_IN_PIN)); // read bit on rising edge
8698
}
8799
return out;
88100
}
@@ -91,13 +103,13 @@ static bool rv_dm_reset(void)
91103
{
92104
// toggle the clock 100 times
93105
SWDIO_MODE_DRIVE();
94-
gpio_set(SWDIO_PORT, SWDIO_PIN);
106+
IO_ON();
95107
for (int i = 0; i < 5; i++) // 100 bits to 1
96108
{
97109
rv_write_nbits(20, 0xfffff);
98110
}
99-
gpio_clear(SWDIO_PORT, SWDIO_PIN);
100-
gpio_set(SWDIO_PORT, SWDIO_PIN);
111+
IO_OFF();
112+
IO_ON();
101113
platform_delay(10);
102114
return true;
103115
}

src/platforms/swlink/platform.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ void platform_init(void)
6363
/* Unmap JTAG Pins so we can reuse as GPIO */
6464
data = AFIO_MAPR;
6565
data &= ~AFIO_MAPR_SWJ_MASK;
66-
data |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_OFF;
66+
data |= AFIO_MAPR_SWJ_CFG_JTAG_OFF_SW_ON;
6767
AFIO_MAPR = data;
6868
/* Setup JTAG GPIO ports */
6969
gpio_set_mode(TMS_PORT, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_INPUT_FLOAT, TMS_PIN);

src/platforms/swlink/platform.h

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
#include "timing_stm32.h"
3030

3131
#define PLATFORM_HAS_TRACESWO
32+
#define PLATFORM_HAS_RVSWD
3233

3334
#if ENABLE_DEBUG == 1
3435
#define PLATFORM_HAS_DEBUG
@@ -43,11 +44,11 @@ extern bool debug_bmp;
4344
#define TDI_PORT GPIOA
4445
#define TDO_PORT GPIOB
4546
#define TRST_PORT GPIOB
46-
#define TMS_PIN GPIO5
47-
#define TCK_PIN GPIO6
47+
#define TMS_PIN GPIO6
48+
#define TCK_PIN GPIO5
4849
#define TDI_PIN GPIO15
4950
#define TDO_PIN GPIO3
50-
#define TRST_PIN GPIO4
51+
#define TRST_PIN GPIO0
5152

5253
#define SWDIO_PORT TMS_PORT
5354
#define SWCLK_PORT TCK_PORT
@@ -61,8 +62,8 @@ extern bool debug_bmp;
6162
#define LED_PORT_UART GPIOC
6263
#define LED_UART GPIO14
6364

64-
#define SWD_CR GPIO_CRH(SWDIO_PORT)
65-
#define SWD_CR_MULT (1U << ((13U - 8U) << 2U))
65+
#define SWD_CR GPIO_CRL(SWDIO_PORT)
66+
#define SWD_CR_MULT (1U << ((6U) << 2U))
6667

6768
#define TMS_SET_MODE() gpio_set_mode(TMS_PORT, GPIO_MODE_OUTPUT_2_MHZ, GPIO_CNF_OUTPUT_PUSHPULL, TMS_PIN);
6869
#define SWDIO_MODE_FLOAT() \

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