Fix SPI clock divider calculation

If a clock value greater than the maximum supported
is passed (i.e. > 16MHz), the resulting value written
to the BAUDR register will be 0 which will disable
the serial output clock. Check for this and ensure
the value calculated for BAUDR register is never < 2.

Author: erik.nyquist

libraries/SPI/src/SPI.h

@@ -80,6 +80,12 @@ class SPISettings {
             | ((dataMode << SPI_MODE_SHIFT) & SPI_MODE_MASK);
     /* Set SPI Clock Divider */
     baudr = (SPI_BASE_CLOCK / clock) & SPI_CLOCK_MASK;
+
+    /* clock value passed is > than max supported;
+     * set baudr to 2 for max. speed */
+    if (baudr == 0)
+        baudr = 2;
+
     /* Only MSBFIRST supported in hardware, need to swizzle the bits if
      * LSBFIRST selected */
     lsbFirst = (bitOrder == LSBFIRST) ? true : false;