From 6c1e2310143765b21a933178e73dfb3adb0b16fb Mon Sep 17 00:00:00 2001 From: Jacob Dahl Date: Sat, 29 Aug 2026 14:39:41 -0600 Subject: [PATCH] arch/arm/stm32f4: fudge STM32F411VE NGPIO so GPIOH is enabled STM32_NGPIO_PORTS is (N+15)>>4. 81 (the real pin count) yields six ports A-F, so PH0/PH1 cannot be configured. 113 matches the F40x 100-pin entries and gives A-H. Signed-off-by: Jacob Dahl --- arch/arm/include/stm32f4/chip.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/stm32f4/chip.h b/arch/arm/include/stm32f4/chip.h index 796e1590ab464..9bf947fa6fc23 100644 --- a/arch/arm/include/stm32f4/chip.h +++ b/arch/arm/include/stm32f4/chip.h @@ -215,7 +215,7 @@ # define STM32_NSDIO 1 /* One SDIO interface */ # define STM32_NLCD 0 /* No LCD */ # define STM32_NUSBOTG 1 /* USB OTG FS (only) */ -# define STM32_NGPIO 81 /* GPIOA-H */ +# define STM32_NGPIO 113 /* GPIOA-H. (N+15)>>4 is the port count; 81 yields A-F and drops H. */ # define STM32_NADC 1 /* One 12-bit ADC1, 16 channels */ # define STM32_NDAC 0 /* No DAC */ # define STM32_NCAPSENSE 0 /* No capacitive sensing channels */