diff --git a/arch/arm/src/stm32h7/stm32_allocateheap.c b/arch/arm/src/stm32h7/stm32_allocateheap.c
index ab77f78604da4..30ae0130057d5 100644
--- a/arch/arm/src/stm32h7/stm32_allocateheap.c
+++ b/arch/arm/src/stm32h7/stm32_allocateheap.c
@@ -253,15 +253,15 @@ void up_allocate_heap(void **heap_start, size_t *heap_size)
   DEBUGASSERT(ubase < (uintptr_t)SRAM_END);
 
   /* Adjust that size to account for MPU alignment requirements.
-   * NOTE that there is an implicit assumption that the SRAM123_END
-   * is aligned to the MPU requirement.
+   * NOTE that there is an implicit assumption that SRAM_END is aligned
+   * to the MPU requirement.
    */
 
   log2  = (int)mpu_log2regionfloor(usize);
   DEBUGASSERT((SRAM_END & ((1 << log2) - 1)) == 0);
 
   usize = (1 << log2);
-  ubase = SRAM123_END - usize;
+  ubase = SRAM_END - usize;
 
   /* Return the user-space heap settings */
 
@@ -320,8 +320,8 @@ void up_allocate_kheap(void **heap_start, size_t *heap_size)
   DEBUGASSERT(ubase < (uintptr_t)SRAM_END);
 
   /* Adjust that size to account for MPU alignment requirements.
-   * NOTE that there is an implicit assumption that the SRAM123_END
-   * is aligned to the MPU requirement.
+   * NOTE that there is an implicit assumption that SRAM_END is aligned
+   * to the MPU requirement.
    */
 
   log2  = (int)mpu_log2regionfloor(usize);
diff --git a/arch/arm/src/stm32h7/stm32_mpuinit.c b/arch/arm/src/stm32h7/stm32_mpuinit.c
index a141895b21020..f6912bb5d1d88 100644
--- a/arch/arm/src/stm32h7/stm32_mpuinit.c
+++ b/arch/arm/src/stm32h7/stm32_mpuinit.c
@@ -52,6 +52,26 @@
 #  endif
 #endif
 
+/****************************************************************************
+ * Private Functions
+ ****************************************************************************/
+
+#ifdef CONFIG_BUILD_PROTECTED
+static void stm32_mpu_user_intsram(uintptr_t start, size_t size)
+{
+  /* STM32H7 protected user memory can span AXI and D2 SRAM.  Keep it
+   * Normal and non-shareable so that LDREX/STREX use the CPU-local
+   * exclusive monitor.  Dual-core RPTUN shared memory is mapped separately
+   * below with shareable attributes.
+   */
+
+  mpu_configure_region(start, size,
+                       MPU_RASR_TEX_SO |
+                       MPU_RASR_C |
+                       MPU_RASR_AP_RWRW);
+}
+#endif
+
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -94,7 +114,7 @@ void stm32_mpuinitialize(void)
   mpu_user_flash(USERSPACE->us_textstart,
                  USERSPACE->us_textend - USERSPACE->us_textstart);
 
-  mpu_user_intsram(datastart, dataend - datastart);
+  stm32_mpu_user_intsram(datastart, dataend - datastart);
 #endif
 
 #ifdef CONFIG_RPTUN
@@ -121,7 +141,7 @@ void stm32_mpuinitialize(void)
 
 void stm32_mpu_uheap(uintptr_t start, size_t size)
 {
-  mpu_user_intsram(start, size);
+  stm32_mpu_user_intsram(start, size);
 }
 #endif