From c270da37add02870b28d473073cafae410385357 Mon Sep 17 00:00:00 2001 From: Vladimir Smitka Date: Tue, 1 Sep 2026 13:35:40 +0000 Subject: [PATCH] pajenicko_picopad: request 62.5MHz for the ST7789, not 60MHz The PL022 SPI block can only divide clk_peri (125MHz) by even integers, and the driver rounds DOWN: requesting 60MHz yields an actual 31.25MHz clock - half the display bandwidth for every user of this board. Requesting exactly clk_peri/2 = 62.5MHz gets full speed; the ST7789 in this wiring handles it (device-measured: a full-screen 320x240 push drops from 47.4ms to the ~20ms wire floor, matching the sibling pajenicko_picopad_game testbed config that already requests 62500000). --- ports/raspberrypi/boards/pajenicko_picopad/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/ports/raspberrypi/boards/pajenicko_picopad/board.c b/ports/raspberrypi/boards/pajenicko_picopad/board.c index d8f93922623..9edebba57b4 100644 --- a/ports/raspberrypi/boards/pajenicko_picopad/board.c +++ b/ports/raspberrypi/boards/pajenicko_picopad/board.c @@ -54,7 +54,8 @@ void board_init(void) { MP_OBJ_FROM_PTR(&pin_GPIO17), // TFT_DC Command or data MP_OBJ_FROM_PTR(&pin_GPIO21), // TFT_CS Chip select MP_OBJ_FROM_PTR(&pin_GPIO20), // TFT_RST Reset - 60000000, // Baudrate + 62500000, // Baudrate: exactly clk_peri/2 (125MHz/2). Requesting 60MHz makes the + // PL022 divider round DOWN to 31.25MHz - half the display bandwidth. 0, // Polarity 0); // Phase