diff --git a/flow/designs/gf12/tinyRocket/config.mk b/flow/designs/gf12/tinyRocket/config.mk index 08e3a88942..dbb38a9d2b 100644 --- a/flow/designs/gf12/tinyRocket/config.mk +++ b/flow/designs/gf12/tinyRocket/config.mk @@ -25,11 +25,8 @@ export WRAP_LIBS = $(PLATFORM_DIR)/lib/gf12_1rf_lg6_w32_all_ffpg_sigcmin_0p export ADDITIONAL_GDS = $(PLATFORM_DIR)/gds/gf12_1rf_lg6_w32_all.gds2 \ $(PLATFORM_DIR)/gds/gf12_1rf_lg6_w32_byte.gds2 -# These values must be multiples of placement site -export DIE_AREA = 0 0 400.008 399.84 -export CORE_AREA = 19.992 20.16 380.016 380.16 - -export PLACE_DENSITY = 0.20 +export CORE_UTILIZATION = 50 +export PLACE_DENSITY_LB_ADDON = 0.10 export MACRO_WRAPPERS = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/wrappers.tcl diff --git a/flow/designs/gf12/tinyRocket/constraint.sdc b/flow/designs/gf12/tinyRocket/constraint.sdc index 3853c418be..7c7e8693b2 100644 --- a/flow/designs/gf12/tinyRocket/constraint.sdc +++ b/flow/designs/gf12/tinyRocket/constraint.sdc @@ -1,6 +1,6 @@ set clk_name core_clock set clk_port_name clock -set clk_period 800 +set clk_period 700 set clk_io_pct 0.2 set clk_port [get_ports $clk_port_name] diff --git a/flow/designs/gf180/ibex/config.mk b/flow/designs/gf180/ibex/config.mk index 036ce5145e..8657b5ab82 100644 --- a/flow/designs/gf180/ibex/config.mk +++ b/flow/designs/gf180/ibex/config.mk @@ -12,7 +12,7 @@ export SYNTH_HDL_FRONTEND = slang export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc -export CORE_UTILIZATION = 45 +export CORE_UTILIZATION = 75 export PLACE_DENSITY_LB_ADDON = 0.1 export SWAP_ARITH_OPERATORS = 1 diff --git a/flow/designs/gf180/ibex/rules-base.json b/flow/designs/gf180/ibex/rules-base.json index faa19d9198..d4c1c815c2 100644 --- a/flow/designs/gf180/ibex/rules-base.json +++ b/flow/designs/gf180/ibex/rules-base.json @@ -18,11 +18,11 @@ "compare": "==" }, "placeopt__design__instance__area": { - "value": 725567, + "value": 724846, "compare": "<=" }, "placeopt__design__instance__count__stdcell": { - "value": 15783, + "value": 15301, "compare": "<=" }, "detailedplace__design__violations": { @@ -30,11 +30,11 @@ "compare": "==" }, "cts__design__instance__count__setup_buffer": { - "value": 1372, + "value": 1330, "compare": "<=" }, "cts__design__instance__count__hold_buffer": { - "value": 1372, + "value": 1330, "compare": "<=" }, "cts__timing__setup__ws": { @@ -62,7 +62,7 @@ "compare": ">=" }, "globalroute__timing__setup__tns": { - "value": -2.0, + "value": -8.23, "compare": ">=" }, "globalroute__timing__hold__ws": { @@ -94,7 +94,7 @@ "compare": ">=" }, "finish__timing__setup__tns": { - "value": -2.07, + "value": -31.7, "compare": ">=" }, "finish__timing__hold__ws": { diff --git a/flow/designs/ihp-sg13g2/aes/config.mk b/flow/designs/ihp-sg13g2/aes/config.mk index 269fa64602..a290081fc7 100644 --- a/flow/designs/ihp-sg13g2/aes/config.mk +++ b/flow/designs/ihp-sg13g2/aes/config.mk @@ -5,7 +5,7 @@ export PLATFORM = ihp-sg13g2 export VERILOG_FILES = $(sort $(wildcard $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/*.v)) export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc -export CORE_UTILIZATION = 20 +export CORE_UTILIZATION = 85 export CORE_ASPECT_RATIO = 1 export PLACE_DENSITY = 0.65 diff --git a/flow/designs/ihp-sg13g2/aes/constraint.sdc b/flow/designs/ihp-sg13g2/aes/constraint.sdc index 2547d402b3..9f875e41da 100644 --- a/flow/designs/ihp-sg13g2/aes/constraint.sdc +++ b/flow/designs/ihp-sg13g2/aes/constraint.sdc @@ -2,7 +2,7 @@ current_design aes_cipher_top set clk_name clk set clk_port_name clk -set clk_period 4.5 +set clk_period 3 set clk_io_pct 0.2 set clk_port [get_ports $clk_port_name] diff --git a/flow/designs/ihp-sg13g2/riscv32i/config.mk b/flow/designs/ihp-sg13g2/riscv32i/config.mk index e2bbb90b2d..9ef0037bd1 100644 --- a/flow/designs/ihp-sg13g2/riscv32i/config.mk +++ b/flow/designs/ihp-sg13g2/riscv32i/config.mk @@ -7,7 +7,7 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint. export USE_FILL = 1 -export CORE_UTILIZATION = 35 +export CORE_UTILIZATION = 75 export PLACE_DENSITY_LB_ADDON = 0.2 export TNS_END_PERCENT = 100 export CTS_BUF_DISTANCE = 60 diff --git a/flow/designs/ihp-sg13g2/riscv32i/rules-base.json b/flow/designs/ihp-sg13g2/riscv32i/rules-base.json index 2a3274645a..fb737425a3 100644 --- a/flow/designs/ihp-sg13g2/riscv32i/rules-base.json +++ b/flow/designs/ihp-sg13g2/riscv32i/rules-base.json @@ -10,7 +10,7 @@ "level": "warning" }, "synth__design__instance__area__stdcell": { - "value": 140000.0, + "value": 139000.0, "compare": "<=" }, "constraints__clocks__count": { @@ -18,11 +18,11 @@ "compare": "==" }, "placeopt__design__instance__area": { - "value": 157813, + "value": 156855, "compare": "<=" }, "placeopt__design__instance__count__stdcell": { - "value": 10692, + "value": 10640, "compare": "<=" }, "detailedplace__design__violations": { @@ -30,11 +30,11 @@ "compare": "==" }, "cts__design__instance__count__setup_buffer": { - "value": 930, + "value": 925, "compare": "<=" }, "cts__design__instance__count__hold_buffer": { - "value": 930, + "value": 925, "compare": "<=" }, "cts__timing__setup__ws": { @@ -74,7 +74,7 @@ "compare": ">=" }, "detailedroute__route__wirelength": { - "value": 456338, + "value": 575080, "compare": "<=" }, "detailedroute__route__drc_errors": { @@ -106,7 +106,7 @@ "compare": ">=" }, "finish__design__instance__area": { - "value": 168206, + "value": 167407, "compare": "<=" } } \ No newline at end of file diff --git a/flow/designs/nangate45/bp_fe_top/config.mk b/flow/designs/nangate45/bp_fe_top/config.mk index b63012a4ba..f9c7ad13a0 100644 --- a/flow/designs/nangate45/bp_fe_top/config.mk +++ b/flow/designs/nangate45/bp_fe_top/config.mk @@ -16,15 +16,15 @@ export ADDITIONAL_LIBS = $(PLATFORM_DIR)/lib/fakeram45_512x64.lib \ $(PLATFORM_DIR)/lib/fakeram45_64x7.lib \ $(PLATFORM_DIR)/lib/fakeram45_64x96.lib -export DIE_AREA = 0 0 800 600 -export CORE_AREA = 10 10 790 590 + +export CORE_UTILIZATION = 50 +export PLACE_DENSITY_LB_ADDON = 0.11 export IO_CONSTRAINTS = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/io.tcl export MACRO_PLACE_HALO = 10 10 -export PLACE_DENSITY_LB_ADDON = 0.11 export TNS_END_PERCENT = 100 export FASTROUTE_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NAME)/fastroute.tcl diff --git a/tools/OpenROAD b/tools/OpenROAD index 0b54bb3203..2ac546acaf 160000 --- a/tools/OpenROAD +++ b/tools/OpenROAD @@ -1 +1 @@ -Subproject commit 0b54bb3203e0895f87940ff982358a6e4d406e28 +Subproject commit 2ac546acaf350111732655ae402ea952d06d362c