diff --git a/variants/esp32/ESP32_GENERIC_S3/LCD_4_3/mpconfigvariant.cmake b/variants/esp32/ESP32_GENERIC_S3/LCD_4_3/mpconfigvariant.cmake index d6dd17bf..59dbe0de 100644 --- a/variants/esp32/ESP32_GENERIC_S3/LCD_4_3/mpconfigvariant.cmake +++ b/variants/esp32/ESP32_GENERIC_S3/LCD_4_3/mpconfigvariant.cmake @@ -1,3 +1,3 @@ -# Upstream's octal-PSRAM variant, unchanged. This board's own settings are the -# sdkconfig beside this file, which build_mp.py appends last. +# Upstream's octal-PSRAM variant, unchanged. This board needs nothing beyond +# what every S3 build gets (variants/esp32/sdkconfig.esp32s3). include(${MICROPY_BOARD_DIR}/mpconfigvariant_SPIRAM_OCT.cmake) diff --git a/variants/esp32/ESP32_GENERIC_S3/LCD_4_3/sdkconfig b/variants/esp32/ESP32_GENERIC_S3/LCD_4_3/sdkconfig deleted file mode 100644 index ed225ed8..00000000 --- a/variants/esp32/ESP32_GENERIC_S3/LCD_4_3/sdkconfig +++ /dev/null @@ -1,25 +0,0 @@ -# Waveshare ESP32-S3-Touch-LCD-4.3: the tuning that is this board's alone, on -# top of every S3's (variants/esp32/sdkconfig.esp32s3). CircuitPython's build -# for this board carries the same three cache settings and a 1 ms tick; the -# LCD-7 variant has all four. -# -# lv_test_timer's frame rate on the board (`kit` run, median of three): -# port defaults 10.4 fps -# caches only 11.7 -# 1 ms tick only 17.7 -# both, as below 17.7 (16.6 averaged over the whole run, 9.3 -# with the defaults) - -# 1 ms tick. DotClockFramebuffer.refresh() waits for the panel to take the new -# frame buffer by polling with vTaskDelay(1), and at the port's 100 Hz that is -# a 10 ms sleep: every LVGL present spent 30 ms there, 14-16 ms with this. -CONFIG_FREERTOS_HZ=1000 - -# Caches sized for LVGL. Its code runs from flash and its objects and -# framebuffers live in PSRAM, which the RGB scanout is streaming from at the -# same time; with the port's 16 KB instruction cache, 32 KB data cache and -# 32-byte lines, LVGL's draw work took 16 ms of a frame and takes 9 ms with -# these. They take 48 KB of internal RAM. -CONFIG_ESP32S3_DATA_CACHE_LINE_64B=y -CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB=y -CONFIG_ESP32S3_DATA_CACHE_64KB=y diff --git a/variants/esp32/ESP32_GENERIC_S3/LCD_7/sdkconfig b/variants/esp32/ESP32_GENERIC_S3/LCD_7/sdkconfig index a6ae3103..9cabf659 100644 --- a/variants/esp32/ESP32_GENERIC_S3/LCD_7/sdkconfig +++ b/variants/esp32/ESP32_GENERIC_S3/LCD_7/sdkconfig @@ -22,30 +22,8 @@ CONFIG_ESP_WIFI_RX_BA_WIN=8 CONFIG_LWIP_TCP_WND_DEFAULT=16384 CONFIG_LWIP_TCP_RECVMBOX_SIZE=16 -# 1 ms tick. At 100 Hz, MicroPython's sleep_ms() under one tick falls through -# to mp_hal_delay_us() and busy-waits with the GIL held: appdev's 10 ms loop -# kept the UI thread 54 % busy while idle and starved every other Python -# thread, and 2-5 ms native waits rounded down to zero ticks. -CONFIG_FREERTOS_HZ=1000 - -# Caches sized for LVGL. Its code runs from flash and its objects and -# framebuffers live in PSRAM, which the RGB scanout is streaming from at the -# same time; with the port's 16 KB instruction cache and 32-byte lines every -# LVGL call ran 5-10x slower than its code. Measured on the remote's UI -# (2026-09-25): 64-byte lines took a full-screen redraw from 176 to 146 ms; -# a 32 KB instruction cache then took a list row from 66 to 44 ms and the -# redraw to 117 ms. -# -# A 64 KB data cache on top, measured while the board also decodes and -# streams audio: full redraw 205 -> 147 ms, panel switch 88 -> 59 ms, 30 -# list rows built 780 -> 399 ms and laid out 608 -> 335 ms. The same layout -# runs ~216x faster on a desktop, so this board is memory-bound, and the -# data cache is the lever. Together the caches take 48 KB of internal RAM: -# free internal went 54 -> 23 KB. Soaked 30 min of real use (about 25 skips -# and track picks, Wi-Fi streaming and a USB host running): the minimum -# stayed at 17 KB, with no allocation failures, Wi-Fi drops or audio -# stalls. (The 24-byte failure above came from every malloc under 8 KB -# landing in internal RAM; ALWAYSINTERNAL=512 sends those to PSRAM now.) -CONFIG_ESP32S3_DATA_CACHE_LINE_64B=y -CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB=y -CONFIG_ESP32S3_DATA_CACHE_64KB=y +# The 1 ms tick and the larger caches come from every S3's settings now. With +# them, free internal RAM under the remote's UI went 54 -> 23 KB, and a 30 min +# soak of real use stayed above 17 KB with no allocation failures, Wi-Fi drops +# or audio stalls. (A 24-byte failure on this board came from every malloc +# under 8 KB landing in internal RAM; ALWAYSINTERNAL=512 sends those to PSRAM.) diff --git a/variants/esp32/sdkconfig.esp32s3 b/variants/esp32/sdkconfig.esp32s3 index c5260921..774dccaa 100644 --- a/variants/esp32/sdkconfig.esp32s3 +++ b/variants/esp32/sdkconfig.esp32s3 @@ -44,3 +44,29 @@ CONFIG_LWIP_TCP_SACK_OUT=y CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP=y CONFIG_ESP_WIFI_RX_BA_WIN=16 CONFIG_ESP_WIFI_DYNAMIC_RX_BUFFER_NUM=48 + +# A 1 ms tick and caches sized for LVGL, on every S3 board, whether or not it +# shipped with a display: a display added after flashing gets the same speed. +# +# The tick: at the port's 100 Hz, any wait shorter than 10 ms rounds to a whole +# tick. DotClockFramebuffer.refresh() polls for the panel to take the new frame +# with vTaskDelay(1), a 10 ms sleep at 100 Hz, and sleep_ms() under one tick +# busy-waits with the GIL held. +# +# The caches: LVGL's code runs from flash and its objects and frame buffers +# live in PSRAM, so the port's 16 KB instruction cache, 32 KB data cache and +# 32-byte lines starve it. Together these take 48 KB of internal RAM. +# +# lv_test_timer's kit run, median of three, port defaults -> these four: +# Waveshare LCD-4.3 (RGB panel) 10.4 -> 17.7 fps (the tick alone: 17.7) +# LilyGO T-Embed (SPI panel) 59.5 -> 66.9 fps, with the frame period at +# 1 ms (at the standard 33 ms it's pinned at +# 30 either way); free internal RAM with the +# display up went 175,867 -> 161,295 B +# Waveshare LCD-7, under its remote UI: a full-screen redraw 205 -> 147 ms +# A 36-minute Wi-Fi and TLS soak on the LCD-4.3 with these never had less than +# 94 KB of internal RAM free. +CONFIG_FREERTOS_HZ=1000 +CONFIG_ESP32S3_DATA_CACHE_LINE_64B=y +CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB=y +CONFIG_ESP32S3_DATA_CACHE_64KB=y