MUA-Witekio: Fixing the fsl SAI kernel module and correcting the DTS (nxp-imx#24)

* Initial sound card integration

* Added reserved memory space for Cortex-M4

* Added corrections to SAI clock pads and removed unnecessary IO settings

* Override the ALSA slot width. reset it to 32-bit

* Fixed wrong bus clock setting

* Corrected the clock sync setting of SAI 1,3 so that the RX follows the bit clock of the TX

* Reactivated HW Crypto accelerator

* Reactivated CAAM

* Ethernet reset line deployed

* Removed the extra SAI cfg that was enforced in case of missing cfgs, corrected the DTS accordingly

Author: MUA91

arch/arm64/boot/dts/freescale/mt-connect.dts

@@ -142,24 +142,26 @@
         pri-dai-link {
             link-name = "interproc audio";
             format = "i2s";
+			dai-tdm-slot-num = <8>;
+			dai-tdm-slot-width = <32>;
 			fsl,mclk-equal-bclk;
             cpu {
                 sound-dai = <&sai1>;
-				dai-tdm-slot-width = <32>;
             };
         };
     };
 
 	sound_Headphone {
         compatible = "fsl,imx-audio-card";
-        model = "imx-audio-card";			/*Dummy Codec*/
+        model = "imx-audio-card";		
         pri-dai-link {
             link-name = "Headphone audio";
             format = "i2s";
+			dai-tdm-slot-num = <2>;
+			dai-tdm-slot-width = <32>;
 			fsl,mclk-equal-bclk;
             cpu {
                 sound-dai = <&sai3>;
-				dai-tdm-slot-width = <32>;
             };
         };
     };
@@ -417,6 +419,7 @@
 		<&dante_osc_sclk>,
 		<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
 	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+	fsl,dataline = <1 0x00 0x01>; /*I2S mode enabled, 0 RX lines, 1 TX lines*/
 	fsl,txs-rxs;
 	status = "okay";
 };
@@ -428,7 +431,7 @@
 		<&dante_osc_sclk>,
 		<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_CLK_DUMMY>;
 	clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
-	fsl,dataline = <1 0x0F 0x0F>; /*I2S mode enabled, 4 TX lines, 4 RX lines*/
+	fsl,dataline = <1 0x0F 0x0F>; /*I2S mode enabled, 4 RX lines, 4 TX lines*/
 	fsl,txs-rxs;
 	status = "okay";
 };

sound/soc/fsl/fsl_sai.c

@@ -550,7 +550,7 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream,
 		slots = sai->slots;
 	else if (sai->bclk_ratio)
 		slots = sai->bclk_ratio / slot_width;
-
+		
 	pins = DIV_ROUND_UP(channels, slots);
 
 	/*
@@ -1266,8 +1266,7 @@ static int fsl_sai_read_dlcfg(struct fsl_sai *sai)
 	}
 
 	num_cfg = elems / 3;
-	/*  Add one more for default value */
-	cfg = devm_kzalloc(&pdev->dev, (num_cfg + 1) * sizeof(*cfg), GFP_KERNEL);
+	cfg = devm_kzalloc(&pdev->dev, (num_cfg) * sizeof(*cfg), GFP_KERNEL);
 	if (!cfg)
 		return -ENOMEM;
 
@@ -1283,7 +1282,7 @@ static int fsl_sai_read_dlcfg(struct fsl_sai *sai)
 	cfg[0].mask[1] = soc_dl;
 	cfg[0].start_off[1] = 0;
 	cfg[0].next_off[1] = 0;
-	for (i = 1, index = 0; i < num_cfg + 1; i++) {
+	for (i = 0, index = 0; i < num_cfg; i++) {
 		/*
 		 * type of dataline
 		 * 0 means default mode
@@ -1325,7 +1324,7 @@ static int fsl_sai_read_dlcfg(struct fsl_sai *sai)
 	}
 
 	sai->dl_cfg = cfg;
-	sai->dl_cfg_cnt = num_cfg + 1;
+	sai->dl_cfg_cnt = num_cfg;
 	return 0;
 }