From 77ab629c5a58cea5605e934393135684bb20861a Mon Sep 17 00:00:00 2001 From: Ghost <2643782046@qq.com> Date: Sun, 22 Mar 2026 15:33:13 +0800 Subject: [PATCH 1/4] chore(build): update sdkconfig to 5.5.3 and guard c5 firmware embedded symbols --- firmware_p4/components/Service/CMakeLists.txt | 4 + .../Service/c5_flasher/c5_flasher.c | 7 ++ firmware_p4/sdkconfig | 103 +++++++++++++----- 3 files changed, 86 insertions(+), 28 deletions(-) diff --git a/firmware_p4/components/Service/CMakeLists.txt b/firmware_p4/components/Service/CMakeLists.txt index ea323e2a..d7575e1c 100644 --- a/firmware_p4/components/Service/CMakeLists.txt +++ b/firmware_p4/components/Service/CMakeLists.txt @@ -100,9 +100,13 @@ idf_component_register(SRCS # Embed C5 Firmware Binary into Service component (used by c5_flasher) set(C5_BIN_PATH "${CMAKE_SOURCE_DIR}/../firmware_c5/build/TentacleOS_C5.bin") +set(C5_FIRMWARE_EMBEDDED 0) if(EXISTS ${C5_BIN_PATH}) target_add_binary_data(${COMPONENT_LIB} "${C5_BIN_PATH}" BINARY) + set(C5_FIRMWARE_EMBEDDED 1) message(STATUS "Embedding C5 Firmware: ${C5_BIN_PATH}") else() message(WARNING "C5 Firmware binary not found at ${C5_BIN_PATH}. Firmware update feature will be disabled.") endif() + +target_compile_definitions(${COMPONENT_LIB} PRIVATE C5_FIRMWARE_EMBEDDED=${C5_FIRMWARE_EMBEDDED}) diff --git a/firmware_p4/components/Service/c5_flasher/c5_flasher.c b/firmware_p4/components/Service/c5_flasher/c5_flasher.c index 25eac6ce..57018b57 100644 --- a/firmware_p4/components/Service/c5_flasher/c5_flasher.c +++ b/firmware_p4/components/Service/c5_flasher/c5_flasher.c @@ -12,8 +12,10 @@ static const char *TAG = "C5_FLASHER"; #define FLASH_BLOCK_SIZE 1024 // Access to embedded binary symbols +#if C5_FIRMWARE_EMBEDDED extern const uint8_t c5_firmware_bin_start[] asm("_binary_TentacleOS_C5_bin_start"); extern const uint8_t c5_firmware_bin_end[] asm("_binary_TentacleOS_C5_bin_end"); +#endif // ESP Serial Protocol Constants #define ESP_ROM_BAUD 115200 @@ -104,8 +106,13 @@ void c5_flasher_reset_normal(void) { esp_err_t c5_flasher_update(const uint8_t *bin_data, uint32_t bin_size) { if (!bin_data) { +#if C5_FIRMWARE_EMBEDDED bin_data = c5_firmware_bin_start; bin_size = c5_firmware_bin_end - c5_firmware_bin_start; +#else + ESP_LOGE(TAG, "Embedded C5 firmware is unavailable"); + return ESP_ERR_NOT_FOUND; +#endif } if (bin_size == 0) { diff --git a/firmware_p4/sdkconfig b/firmware_p4/sdkconfig index e8acc16c..842f01ca 100644 --- a/firmware_p4/sdkconfig +++ b/firmware_p4/sdkconfig @@ -1,6 +1,6 @@ # # Automatically generated file. DO NOT EDIT. -# Espressif IoT Development Framework (ESP-IDF) 5.5.1 Project Configuration +# Espressif IoT Development Framework (ESP-IDF) 5.5.3 Project Configuration # CONFIG_SOC_ADC_SUPPORTED=y CONFIG_SOC_ANA_CMPR_SUPPORTED=y @@ -59,6 +59,8 @@ CONFIG_SOC_VBAT_SUPPORTED=y CONFIG_SOC_APM_SUPPORTED=y CONFIG_SOC_PMU_SUPPORTED=y CONFIG_SOC_PMU_PVT_SUPPORTED=y +CONFIG_SOC_PVT_EN_WITH_SLEEP=y +CONFIG_SOC_PVT_RETENTION_BY_REGDMA=y CONFIG_SOC_DCDC_SUPPORTED=y CONFIG_SOC_PAU_SUPPORTED=y CONFIG_SOC_LP_TIMER_SUPPORTED=y @@ -94,6 +96,7 @@ CONFIG_SOC_AES_SUPPORT_GCM=y CONFIG_SOC_AES_GDMA=y CONFIG_SOC_AES_SUPPORT_AES_128=y CONFIG_SOC_AES_SUPPORT_AES_256=y +CONFIG_SOC_AES_SUPPORT_PSEUDO_ROUND_FUNCTION=y CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y CONFIG_SOC_ADC_DMA_SUPPORTED=y @@ -150,13 +153,14 @@ CONFIG_SOC_AHB_GDMA_VERSION=2 CONFIG_SOC_GDMA_SUPPORT_CRC=y CONFIG_SOC_GDMA_NUM_GROUPS_MAX=2 CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX=3 +CONFIG_SOC_AHB_GDMA_SUPPORT_PSRAM=y CONFIG_SOC_AXI_GDMA_SUPPORT_PSRAM=y CONFIG_SOC_GDMA_SUPPORT_ETM=y CONFIG_SOC_GDMA_SUPPORT_SLEEP_RETENTION=y -CONFIG_SOC_AXI_DMA_EXT_MEM_ENC_ALIGNMENT=16 +CONFIG_SOC_GDMA_EXT_MEM_ENC_ALIGNMENT=16 CONFIG_SOC_DMA2D_GROUPS=1 -CONFIG_SOC_DMA2D_TX_CHANNELS_PER_GROUP=3 -CONFIG_SOC_DMA2D_RX_CHANNELS_PER_GROUP=2 +CONFIG_SOC_DMA2D_TX_CHANNELS_PER_GROUP=4 +CONFIG_SOC_DMA2D_RX_CHANNELS_PER_GROUP=3 CONFIG_SOC_ETM_GROUPS=1 CONFIG_SOC_ETM_CHANNELS_PER_GROUP=50 CONFIG_SOC_ETM_SUPPORT_SLEEP_RETENTION=y @@ -176,12 +180,13 @@ CONFIG_SOC_GPIO_OUT_RANGE_MAX=54 CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK=0 CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT=16 CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x007FFFFFFFFF0000 +CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y +CONFIG_SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP=y CONFIG_SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX=y CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=2 CONFIG_SOC_CLOCKOUT_SUPPORT_CHANNEL_DIVIDER=y CONFIG_SOC_DEBUG_PROBE_NUM_UNIT=1 CONFIG_SOC_DEBUG_PROBE_MAX_OUTPUT_WIDTH=16 -CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y CONFIG_SOC_RTCIO_PIN_COUNT=16 CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y @@ -230,12 +235,15 @@ CONFIG_SOC_I2S_TDM_FULL_DATA_WIDTH=y CONFIG_SOC_I2S_SUPPORT_SLEEP_RETENTION=y CONFIG_SOC_LP_I2S_NUM=1 CONFIG_SOC_ISP_BF_SUPPORTED=y +CONFIG_SOC_ISP_BLC_SUPPORTED=y CONFIG_SOC_ISP_CCM_SUPPORTED=y +CONFIG_SOC_ISP_COLOR_SUPPORTED=y +CONFIG_SOC_ISP_CROP_SUPPORTED=y CONFIG_SOC_ISP_DEMOSAIC_SUPPORTED=y CONFIG_SOC_ISP_DVP_SUPPORTED=y -CONFIG_SOC_ISP_SHARPEN_SUPPORTED=y -CONFIG_SOC_ISP_COLOR_SUPPORTED=y CONFIG_SOC_ISP_LSC_SUPPORTED=y +CONFIG_SOC_ISP_SHARPEN_SUPPORTED=y +CONFIG_SOC_ISP_WBG_SUPPORTED=y CONFIG_SOC_ISP_SHARE_CSI_BRG=y CONFIG_SOC_ISP_NUMS=1 CONFIG_SOC_ISP_DVP_CTLR_NUMS=1 @@ -244,6 +252,8 @@ CONFIG_SOC_ISP_AE_BLOCK_X_NUMS=5 CONFIG_SOC_ISP_AE_BLOCK_Y_NUMS=5 CONFIG_SOC_ISP_AF_CTLR_NUMS=1 CONFIG_SOC_ISP_AF_WINDOW_NUMS=3 +CONFIG_SOC_ISP_AWB_WINDOW_X_NUMS=5 +CONFIG_SOC_ISP_AWB_WINDOW_Y_NUMS=5 CONFIG_SOC_ISP_BF_TEMPLATE_X_NUMS=3 CONFIG_SOC_ISP_BF_TEMPLATE_Y_NUMS=3 CONFIG_SOC_ISP_CCM_DIMENSION=3 @@ -297,7 +307,7 @@ CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8 CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48 CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION=y -CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP=y +CONFIG_SOC_RMT_SUPPORT_ASYNC_STOP=y CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP=y CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO=y @@ -367,6 +377,8 @@ CONFIG_SOC_SHA_SUPPORT_SHA512=y CONFIG_SOC_SHA_SUPPORT_SHA512_224=y CONFIG_SOC_SHA_SUPPORT_SHA512_256=y CONFIG_SOC_SHA_SUPPORT_SHA512_T=y +CONFIG_SOC_ECC_CONSTANT_TIME_POINT_MUL=y +CONFIG_SOC_ECC_SUPPORT_CURVE_P384=y CONFIG_SOC_ECDSA_SUPPORT_EXPORT_PUBKEY=y CONFIG_SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE=y CONFIG_SOC_ECDSA_USES_MPI=y @@ -402,6 +414,8 @@ CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING=y CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_DQS=y CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_FLASH_DELAY=y CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP=y +CONFIG_SOC_SPI_MEM_PSRAM_FREQ_AXI_CONSTRAINED=y +CONFIG_SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR=y CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT=y CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y @@ -469,6 +483,7 @@ CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES=y CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS=y CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128=y CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256=y +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_SUPPORT_PSEUDO_ROUND=y CONFIG_SOC_UART_NUM=6 CONFIG_SOC_UART_HP_NUM=5 CONFIG_SOC_UART_LP_NUM=1 @@ -497,6 +512,7 @@ CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP_MODE_PER_PIN=y CONFIG_SOC_PM_EXT1_WAKEUP_BY_PMU=y CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP=y CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y +CONFIG_SOC_PM_SUPPORT_CPU_PD=y CONFIG_SOC_PM_SUPPORT_XTAL32K_PD=y CONFIG_SOC_PM_SUPPORT_RC32K_PD=y CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y @@ -510,7 +526,6 @@ CONFIG_SOC_PM_CACHE_RETENTION_BY_PAU=y CONFIG_SOC_PM_PAU_LINK_NUM=4 CONFIG_SOC_PM_PAU_REGDMA_LINK_MULTI_ADDR=y CONFIG_SOC_PAU_IN_TOP_DOMAIN=y -CONFIG_SOC_CPU_IN_TOP_DOMAIN=y CONFIG_SOC_PM_PAU_REGDMA_UPDATE_CACHE_BEFORE_WAIT_COMPARE=y CONFIG_SOC_SLEEP_SYSTIMER_STALL_WORKAROUND=y CONFIG_SOC_SLEEP_TGWDT_STOP_WORKAROUND=y @@ -532,7 +547,6 @@ CONFIG_SOC_TSENS_IS_INDEPENDENT_FROM_ADC=y CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_ETM=y CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_SLEEP_RETENTION=y CONFIG_SOC_MEM_TCM_SUPPORTED=y -CONFIG_SOC_MEM_NON_CONTIGUOUS_SRAM=y CONFIG_SOC_ASYNCHRONOUS_BUS_ERROR_MODE=y CONFIG_SOC_EMAC_IEEE1588V2_SUPPORTED=y CONFIG_SOC_EMAC_USE_MULTI_IO_MUX=y @@ -814,8 +828,16 @@ CONFIG_APPTRACE_LOCK_ENABLE=y # # Common Options # + +# +# BLE Log +# +# CONFIG_BLE_LOG_ENABLED is not set +# end of BLE Log + # CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED is not set # CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED is not set +# CONFIG_BT_LE_USED_MEM_STATISTICS_ENABLED is not set # end of Common Options # end of Bluetooth @@ -965,10 +987,10 @@ CONFIG_ANA_CMPR_OBJ_CACHE_SAFE=y # end of ESP-Driver:Analog Comparator Configurations # -# BitScrambler Configurations +# ESP-Driver:BitScrambler Configurations # # CONFIG_BITSCRAMBLER_CTRL_FUNC_IN_IRAM is not set -# end of BitScrambler Configurations +# end of ESP-Driver:BitScrambler Configurations # # ESP-Driver:Camera Controller Configurations @@ -1109,6 +1131,7 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y # ESP-Driver:TWAI Configurations # # CONFIG_TWAI_ISR_IN_IRAM is not set +# CONFIG_TWAI_IO_FUNC_IN_IRAM is not set # CONFIG_TWAI_ISR_CACHE_SAFE is not set # CONFIG_TWAI_ENABLE_DEBUG_LOG is not set # end of ESP-Driver:TWAI Configurations @@ -1218,23 +1241,32 @@ CONFIG_ESP_HTTPS_SERVER_EVENT_POST_TIMEOUT=2000 # # Hardware Settings # +CONFIG_ESP_HW_SUPPORT_FUNC_IN_IRAM=y # # Chip revision # -# CONFIG_ESP32P4_REV_MIN_0 is not set -CONFIG_ESP32P4_REV_MIN_1=y -# CONFIG_ESP32P4_REV_MIN_100 is not set -CONFIG_ESP32P4_REV_MIN_FULL=1 -CONFIG_ESP_REV_MIN_FULL=1 # -# Maximum Supported ESP32-P4 Revision (Rev v1.99) +# NOTE! Support of ESP32-P4 rev. <3.0 and >=3.0 is mutually exclusive # -CONFIG_ESP32P4_REV_MAX_FULL=199 -CONFIG_ESP_REV_MAX_FULL=199 + +# +# Read the help text of the option below for explanation +# +# CONFIG_ESP32P4_SELECTS_REV_LESS_V3 is not set +# CONFIG_ESP32P4_REV_MIN_300 is not set +CONFIG_ESP32P4_REV_MIN_301=y +CONFIG_ESP32P4_REV_MIN_FULL=301 +CONFIG_ESP_REV_MIN_FULL=301 + +# +# Maximum Supported ESP32-P4 Revision (Rev v3.99) +# +CONFIG_ESP32P4_REV_MAX_FULL=399 +CONFIG_ESP_REV_MAX_FULL=399 CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0 -CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=99 +CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=199 # # Maximum Supported ESP32-P4 eFuse Block Revision (eFuse Block Rev v0.99) @@ -1255,6 +1287,7 @@ CONFIG_ESP32P4_UNIVERSAL_MAC_ADDRESSES=1 # # Sleep Config # +# CONFIG_ESP_SLEEP_POWER_DOWN_FLASH is not set CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y # CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set # CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set @@ -1272,6 +1305,8 @@ CONFIG_RTC_CLK_SRC_INT_RC=y CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_RTC_FAST_CLK_SRC_RC_FAST=y # CONFIG_RTC_FAST_CLK_SRC_XTAL is not set +CONFIG_RTC_CLK_FUNC_IN_IRAM=y +CONFIG_RTC_TIME_FUNC_IN_IRAM=y # end of RTC Clock Config # @@ -1320,7 +1355,6 @@ CONFIG_XTAL_FREQ=40 # # DCDC Regulator Configurations # -CONFIG_ESP_SLEEP_KEEP_DCDC_ALWAYS_ON=y CONFIG_ESP_SLEEP_DCM_VSET_VAL_IN_SLEEP=14 # end of DCDC Regulator Configurations @@ -1333,8 +1367,8 @@ CONFIG_ESP_LDO_VOLTAGE_SPI_NOR_FLASH_3300_MV=y CONFIG_ESP_LDO_VOLTAGE_SPI_NOR_FLASH_DOMAIN=3300 CONFIG_ESP_LDO_RESERVE_PSRAM=y CONFIG_ESP_LDO_CHAN_PSRAM_DOMAIN=2 -CONFIG_ESP_LDO_VOLTAGE_PSRAM_1900_MV=y -CONFIG_ESP_LDO_VOLTAGE_PSRAM_DOMAIN=1900 +CONFIG_ESP_LDO_VOLTAGE_PSRAM_1800_MV=y +CONFIG_ESP_LDO_VOLTAGE_PSRAM_DOMAIN=1800 # end of LDO Regulator Configurations # @@ -1363,15 +1397,18 @@ CONFIG_ESP_BROWNOUT_USE_INTR=y CONFIG_ESP_SPI_BUS_LOCK_ISR_FUNCS_IN_IRAM=y CONFIG_ESP_ENABLE_PVT=y CONFIG_ESP_INTR_IN_IRAM=y +CONFIG_P4_REV3_MSPI_WORKAROUND_SIZE=0 # end of Hardware Settings # # ESP-Driver:LCD Controller Configurations # -# CONFIG_LCD_ENABLE_DEBUG_LOG is not set # CONFIG_LCD_RGB_ISR_IRAM_SAFE is not set # CONFIG_LCD_RGB_RESTART_IN_VSYNC is not set -# CONFIG_LCD_DSI_ISR_IRAM_SAFE is not set +CONFIG_LCD_DSI_ISR_HANDLER_IN_IRAM=y +# CONFIG_LCD_DSI_ISR_CACHE_SAFE is not set +CONFIG_LCD_DSI_OBJ_FORCE_INTERNAL=y +# CONFIG_LCD_ENABLE_DEBUG_LOG is not set # end of ESP-Driver:LCD Controller Configurations # @@ -1411,6 +1448,7 @@ CONFIG_ESP_NETIF_REPORT_DATA_TRAFFIC=y CONFIG_PM_SLEEP_FUNC_IN_IRAM=y # CONFIG_PM_ENABLE is not set CONFIG_PM_SLP_IRAM_OPT=y +CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y # CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP is not set # end of Power Management @@ -1435,13 +1473,14 @@ CONFIG_ESP_ROM_PRINT_IN_IRAM=y # # ESP Security Specific # +# CONFIG_ESP_CRYPTO_FORCE_ECC_CONSTANT_TIME_POINT_MUL is not set # end of ESP Security Specific # # ESP System Settings # -CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_360=y -CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=360 +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_400=y +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=400 # # Cache config @@ -1872,6 +1911,7 @@ CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 CONFIG_LWIP_IPV6_ND6_NUM_PREFIXES=5 CONFIG_LWIP_IPV6_ND6_NUM_ROUTERS=3 CONFIG_LWIP_IPV6_ND6_NUM_DESTINATIONS=10 +# CONFIG_LWIP_IPV6_ND6_ROUTE_INFO_OPTION_SUPPORT is not set # CONFIG_LWIP_PPP_SUPPORT is not set # CONFIG_LWIP_SLIP_SUPPORT is not set @@ -1984,6 +2024,7 @@ CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 CONFIG_MBEDTLS_HARDWARE_AES=y CONFIG_MBEDTLS_AES_USE_INTERRUPT=y CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL=0 +# CONFIG_MBEDTLS_AES_USE_PSEUDO_ROUND_FUNC is not set CONFIG_MBEDTLS_HARDWARE_GCM=y CONFIG_MBEDTLS_GCM_SUPPORT_NON_AES_CIPHER=y CONFIG_MBEDTLS_HARDWARE_MPI=y @@ -2139,6 +2180,8 @@ CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT=y # # CONFIG_OPENTHREAD_SPINEL_ONLY is not set # end of OpenThread Spinel + +# CONFIG_OPENTHREAD_DEBUG is not set # end of OpenThread # @@ -2197,6 +2240,7 @@ CONFIG_SPI_FLASH_HPM_DC_AUTO=y # CONFIG_SPI_FLASH_HPM_DC_DISABLE is not set # CONFIG_SPI_FLASH_AUTO_SUSPEND is not set CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50 +CONFIG_SPI_FLASH_SUSPEND_TRS_VAL_US=50 # CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set # CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND is not set CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM=y @@ -2975,6 +3019,7 @@ CONFIG_POST_EVENTS_FROM_IRAM_ISR=y CONFIG_GDBSTUB_SUPPORT_TASKS=y CONFIG_GDBSTUB_MAX_TASKS=32 # CONFIG_OTA_ALLOW_HTTP is not set +# CONFIG_ESP_SYSTEM_PD_FLASH is not set CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y CONFIG_BROWNOUT_DET=y CONFIG_BROWNOUT_DET_LVL_SEL_7=y @@ -2982,6 +3027,8 @@ CONFIG_BROWNOUT_DET_LVL_SEL_7=y # CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set CONFIG_BROWNOUT_DET_LVL=7 CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y +# CONFIG_LCD_DSI_ISR_IRAM_SAFE is not set +CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU=y CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 CONFIG_MAIN_TASK_STACK_SIZE=8192 From f04c311a56c873f7f913d0db4d65d0992e8f773b Mon Sep 17 00:00:00 2001 From: Ghost <2643782046@qq.com> Date: Mon, 23 Mar 2026 00:37:55 +0800 Subject: [PATCH 2/4] fix(build): adapt sdkconfig for ESP32-P4 partition and driver adjustments --- .../components/Drivers/st7789/st7789.c | 2 +- firmware_p4/partitions.csv | 4 +- firmware_p4/sdkconfig | 80 ++++++++++++------- 3 files changed, 56 insertions(+), 30 deletions(-) diff --git a/firmware_p4/components/Drivers/st7789/st7789.c b/firmware_p4/components/Drivers/st7789/st7789.c index 43e93eb9..20024bcb 100644 --- a/firmware_p4/components/Drivers/st7789/st7789.c +++ b/firmware_p4/components/Drivers/st7789/st7789.c @@ -21,7 +21,7 @@ #define BL_LEDC_MODE LEDC_LOW_SPEED_MODE #define BL_LEDC_CH LEDC_CHANNEL_0 #define BL_LEDC_RES LEDC_TIMER_13_BIT -#define BL_LEDC_FREQ 5000 +#define BL_LEDC_FREQ 4000 #define DISPLAY_CONFIG_PATH "/assets/config/screen/screen_config.conf" static const char *TAG = "ST7789_DRIVER"; diff --git a/firmware_p4/partitions.csv b/firmware_p4/partitions.csv index 25a5530b..b702bbfb 100644 --- a/firmware_p4/partitions.csv +++ b/firmware_p4/partitions.csv @@ -4,5 +4,5 @@ otadata, data, ota, , 8K, phy_init, data, phy, , 4K, ota_0, app, ota_0, 0x20000, 4M, ota_1, app, ota_1, , 4M, -storage, data, fat, , 6M, -assets, data, littlefs, , 16M, +storage, data, fat, , 3M, +assets, data, littlefs, , 4M, diff --git a/firmware_p4/sdkconfig b/firmware_p4/sdkconfig index 842f01ca..01ef8866 100644 --- a/firmware_p4/sdkconfig +++ b/firmware_p4/sdkconfig @@ -570,7 +570,7 @@ CONFIG_IDF_TOOLCHAIN_GCC=y CONFIG_IDF_TARGET_ARCH_RISCV=y CONFIG_IDF_TARGET_ARCH="riscv" CONFIG_IDF_TARGET="esp32p4" -CONFIG_IDF_INIT_VERSION="5.5.1" +CONFIG_IDF_INIT_VERSION="5.5.3" CONFIG_IDF_TARGET_ESP32P4=y CONFIG_IDF_FIRMWARE_CHIP_ID=0x0012 @@ -647,9 +647,6 @@ CONFIG_BOOTLOADER_LOG_MODE_TEXT=y # # CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y -CONFIG_BOOTLOADER_FLASH_32BIT_ADDR=y -CONFIG_BOOTLOADER_FLASH_NEEDS_32BIT_FEAT=y -CONFIG_BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH=y # end of Serial Flash Configurations # CONFIG_BOOTLOADER_FACTORY_RESET is not set @@ -729,20 +726,19 @@ CONFIG_ESPTOOLPY_FLASHMODE_DIO=y # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y CONFIG_ESPTOOLPY_FLASHMODE="dio" -CONFIG_ESPTOOLPY_FLASHFREQ_80M=y -# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set +CONFIG_ESPTOOLPY_FLASHFREQ_40M=y # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set -CONFIG_ESPTOOLPY_FLASHFREQ_VAL=80 -CONFIG_ESPTOOLPY_FLASHFREQ="80m" +CONFIG_ESPTOOLPY_FLASHFREQ_VAL=40 +CONFIG_ESPTOOLPY_FLASHFREQ="40m" # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set -# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_32MB=y +CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE="32MB" +CONFIG_ESPTOOLPY_FLASHSIZE="16MB" # CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set CONFIG_ESPTOOLPY_BEFORE_RESET=y # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set @@ -1254,17 +1250,18 @@ CONFIG_ESP_HW_SUPPORT_FUNC_IN_IRAM=y # # Read the help text of the option below for explanation # -# CONFIG_ESP32P4_SELECTS_REV_LESS_V3 is not set -# CONFIG_ESP32P4_REV_MIN_300 is not set -CONFIG_ESP32P4_REV_MIN_301=y -CONFIG_ESP32P4_REV_MIN_FULL=301 -CONFIG_ESP_REV_MIN_FULL=301 +CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y +CONFIG_ESP32P4_REV_MIN_0=y +# CONFIG_ESP32P4_REV_MIN_1 is not set +# CONFIG_ESP32P4_REV_MIN_100 is not set +CONFIG_ESP32P4_REV_MIN_FULL=0 +CONFIG_ESP_REV_MIN_FULL=0 # -# Maximum Supported ESP32-P4 Revision (Rev v3.99) +# Maximum Supported ESP32-P4 Revision (Rev v1.99) # -CONFIG_ESP32P4_REV_MAX_FULL=399 -CONFIG_ESP_REV_MAX_FULL=399 +CONFIG_ESP32P4_REV_MAX_FULL=199 +CONFIG_ESP_REV_MAX_FULL=199 CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0 CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=199 @@ -1287,8 +1284,8 @@ CONFIG_ESP32P4_UNIVERSAL_MAC_ADDRESSES=1 # # Sleep Config # -# CONFIG_ESP_SLEEP_POWER_DOWN_FLASH is not set CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y +CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND=y # CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU is not set # CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=0 @@ -1448,14 +1445,38 @@ CONFIG_ESP_NETIF_REPORT_DATA_TRAFFIC=y CONFIG_PM_SLEEP_FUNC_IN_IRAM=y # CONFIG_PM_ENABLE is not set CONFIG_PM_SLP_IRAM_OPT=y -CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y # CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP is not set # end of Power Management # # ESP PSRAM # -# CONFIG_SPIRAM is not set +CONFIG_SPIRAM=y + +# +# PSRAM config +# +CONFIG_SPIRAM_MODE_HEX=y +CONFIG_SPIRAM_SPEED_200M=y +# CONFIG_SPIRAM_SPEED_80M is not set +# CONFIG_SPIRAM_SPEED_20M is not set +CONFIG_SPIRAM_SPEED=200 +# CONFIG_SPIRAM_XIP_FROM_PSRAM is not set +# CONFIG_SPIRAM_ECC_ENABLE is not set +CONFIG_SPIRAM_BOOT_HW_INIT=y +CONFIG_SPIRAM_BOOT_INIT=y +CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION=y +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +# CONFIG_SPIRAM_USE_MEMMAP is not set +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +CONFIG_SPIRAM_USE_MALLOC=y +CONFIG_SPIRAM_MEMTEST=y +CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384 +# CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP is not set +CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set +# end of PSRAM config # end of ESP PSRAM # @@ -1479,8 +1500,9 @@ CONFIG_ESP_ROM_PRINT_IN_IRAM=y # # ESP System Settings # -CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_400=y -CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=400 +# CONFIG_ESP_FORCE_400MHZ_ON_REV_LESS_V3 is not set +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_360=y +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=360 # # Cache config @@ -1625,6 +1647,7 @@ CONFIG_FATFS_CODEPAGE=437 CONFIG_FATFS_FS_LOCK=0 CONFIG_FATFS_TIMEOUT_MS=10000 CONFIG_FATFS_PER_FILE_CACHE=y +CONFIG_FATFS_ALLOC_PREFER_EXTRAM=y # CONFIG_FATFS_USE_FASTSEEK is not set CONFIG_FATFS_USE_STRFUNC_NONE=y # CONFIG_FATFS_USE_STRFUNC_WITHOUT_CRLF_CONV is not set @@ -1702,6 +1725,7 @@ CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y # # Extra # +CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y # end of Extra CONFIG_FREERTOS_PORT=y @@ -1987,6 +2011,7 @@ CONFIG_LWIP_HOOK_IP6_INPUT_DEFAULT=y # mbedTLS # CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y +# CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC is not set # CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y @@ -2168,6 +2193,7 @@ CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT=y # CONFIG_NVS_ENCRYPTION is not set # CONFIG_NVS_ASSERT_ERROR_CHECK is not set # CONFIG_NVS_LEGACY_DUP_KEYS_COMPATIBILITY is not set +# CONFIG_NVS_ALLOCATE_CACHE_IN_SPIRAM is not set # end of NVS # @@ -2240,7 +2266,6 @@ CONFIG_SPI_FLASH_HPM_DC_AUTO=y # CONFIG_SPI_FLASH_HPM_DC_DISABLE is not set # CONFIG_SPI_FLASH_AUTO_SUSPEND is not set CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50 -CONFIG_SPI_FLASH_SUSPEND_TRS_VAL_US=50 # CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set # CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND is not set CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM=y @@ -2379,6 +2404,7 @@ CONFIG_USB_HOST_SET_ADDR_RECOVERY_MS=10 # end of Hub Driver Configuration # CONFIG_USB_HOST_ENABLE_ENUM_FILTER_CALLBACK is not set +# CONFIG_USB_HOST_DWC_DMA_CAP_MEMORY_IN_PSRAM is not set CONFIG_USB_OTG_SUPPORTED=y # end of USB-OTG @@ -2537,6 +2563,7 @@ CONFIG_LITTLEFS_MTIME_USE_SECONDS=y # CONFIG_LITTLEFS_MALLOC_STRATEGY_DISABLE is not set CONFIG_LITTLEFS_MALLOC_STRATEGY_DEFAULT=y # CONFIG_LITTLEFS_MALLOC_STRATEGY_INTERNAL is not set +# CONFIG_LITTLEFS_MALLOC_STRATEGY_SPIRAM is not set CONFIG_LITTLEFS_ASSERTS=y # CONFIG_LITTLEFS_MMAP_PARTITION is not set # CONFIG_LITTLEFS_WDT_RESET is not set @@ -3019,7 +3046,6 @@ CONFIG_POST_EVENTS_FROM_IRAM_ISR=y CONFIG_GDBSTUB_SUPPORT_TASKS=y CONFIG_GDBSTUB_MAX_TASKS=32 # CONFIG_OTA_ALLOW_HTTP is not set -# CONFIG_ESP_SYSTEM_PD_FLASH is not set CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y CONFIG_BROWNOUT_DET=y CONFIG_BROWNOUT_DET_LVL_SEL_7=y @@ -3028,7 +3054,6 @@ CONFIG_BROWNOUT_DET_LVL_SEL_7=y CONFIG_BROWNOUT_DET_LVL=7 CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y # CONFIG_LCD_DSI_ISR_IRAM_SAFE is not set -CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU=y CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 CONFIG_MAIN_TASK_STACK_SIZE=8192 @@ -3058,6 +3083,7 @@ CONFIG_TIMER_TASK_PRIORITY=1 CONFIG_TIMER_TASK_STACK_DEPTH=2048 CONFIG_TIMER_QUEUE_LENGTH=10 # CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y # CONFIG_HAL_ASSERTION_SILIENT is not set # CONFIG_L2_TO_L3_COPY is not set CONFIG_ESP_GRATUITOUS_ARP=y From 7abde6db5bdebdf30d6331ec2f1fac7a939414b4 Mon Sep 17 00:00:00 2001 From: Ghost <2643782046@qq.com> Date: Mon, 23 Mar 2026 21:27:59 +0800 Subject: [PATCH 3/4] build(sdkconfig): update c5 and p4 sdkconfigs for 5.5.3 --- firmware_c5/sdkconfig | 278 +++++++++++++++++++++++++++---------- firmware_p4/partitions.csv | 4 +- firmware_p4/sdkconfig | 24 ++-- 3 files changed, 218 insertions(+), 88 deletions(-) diff --git a/firmware_c5/sdkconfig b/firmware_c5/sdkconfig index af28e7d8..6a5ef7c1 100644 --- a/firmware_c5/sdkconfig +++ b/firmware_c5/sdkconfig @@ -1,6 +1,6 @@ # # Automatically generated file. DO NOT EDIT. -# Espressif IoT Development Framework (ESP-IDF) 5.5.1 Project Configuration +# Espressif IoT Development Framework (ESP-IDF) 5.5.3 Project Configuration # CONFIG_SOC_ADC_SUPPORTED=y CONFIG_SOC_ANA_CMPR_SUPPORTED=y @@ -114,8 +114,8 @@ CONFIG_SOC_CPU_SUPPORT_WFE=y CONFIG_SOC_INT_CLIC_SUPPORTED=y CONFIG_SOC_INT_HW_NESTED_SUPPORTED=y CONFIG_SOC_BRANCH_PREDICTOR_SUPPORTED=y -CONFIG_SOC_CPU_BREAKPOINTS_NUM=4 -CONFIG_SOC_CPU_WATCHPOINTS_NUM=4 +CONFIG_SOC_CPU_BREAKPOINTS_NUM=3 +CONFIG_SOC_CPU_WATCHPOINTS_NUM=3 CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=0x100 CONFIG_SOC_CPU_HAS_PMA=y CONFIG_SOC_CPU_IDRAM_SPLIT_USING_PMP=y @@ -131,6 +131,7 @@ CONFIG_SOC_GDMA_PAIRS_PER_GROUP_MAX=3 CONFIG_SOC_GDMA_SUPPORT_ETM=y CONFIG_SOC_GDMA_SUPPORT_SLEEP_RETENTION=y CONFIG_SOC_AHB_GDMA_SUPPORT_PSRAM=y +CONFIG_SOC_GDMA_EXT_MEM_ENC_ALIGNMENT=16 CONFIG_SOC_ETM_GROUPS=1 CONFIG_SOC_ETM_CHANNELS_PER_GROUP=50 CONFIG_SOC_ETM_SUPPORT_SLEEP_RETENTION=y @@ -149,8 +150,9 @@ CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_VALID_GPIO_MASK=0 CONFIG_SOC_GPIO_DEEP_SLEEP_WAKE_SUPPORTED_PIN_CNT=7 CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x0000000001FFFF80 CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y -CONFIG_SOC_GPIO_SUPPORT_HOLD_IO_IN_DSLP=y CONFIG_SOC_GPIO_SUPPORT_HOLD_SINGLE_IO_IN_DSLP=y +CONFIG_SOC_GPIO_CLOCKOUT_BY_GPIO_MATRIX=y +CONFIG_SOC_CLOCKOUT_HAS_SOURCE_GATE=y CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=3 CONFIG_SOC_RTCIO_PIN_COUNT=7 CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y @@ -224,7 +226,7 @@ CONFIG_SOC_RMT_CHANNELS_PER_GROUP=4 CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48 CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y CONFIG_SOC_RMT_SUPPORT_RX_DEMODULATION=y -CONFIG_SOC_RMT_SUPPORT_TX_ASYNC_STOP=y +CONFIG_SOC_RMT_SUPPORT_ASYNC_STOP=y CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP=y CONFIG_SOC_RMT_SUPPORT_TX_SYNCHRO=y @@ -277,10 +279,12 @@ CONFIG_SOC_SHA_SUPPORT_SHA512_224=y CONFIG_SOC_SHA_SUPPORT_SHA512_256=y CONFIG_SOC_SHA_SUPPORT_SHA512_T=y CONFIG_SOC_ECC_CONSTANT_TIME_POINT_MUL=y +CONFIG_SOC_ECC_SUPPORT_CURVE_P384=y CONFIG_SOC_ECDSA_SUPPORT_EXPORT_PUBKEY=y CONFIG_SOC_ECDSA_SUPPORT_DETERMINISTIC_MODE=y CONFIG_SOC_ECDSA_SUPPORT_HW_DETERMINISTIC_LOOP=y CONFIG_SOC_ECDSA_SUPPORT_CURVE_P384=y +CONFIG_SOC_ECDSA_SUPPORT_CURVE_SPECIFIC_KEY_PURPOSES=y CONFIG_SOC_SDM_GROUPS=1 CONFIG_SOC_SDM_CHANNELS_PER_GROUP=4 CONFIG_SOC_SDM_CLK_SUPPORT_PLL_F80M=y @@ -312,6 +316,7 @@ CONFIG_SOC_SPI_MEM_SUPPORT_WB_MODE_INDEPENDENT_CONTROL=y CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP=y CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING=y CONFIG_SOC_SPI_MEM_SUPPORT_TSUS_TRES_SEPERATE_CTR=y +CONFIG_SOC_SPI_MEM_PSRAM_FREQ_AXI_CONSTRAINED=y CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY=y CONFIG_SOC_MEMSPI_SRC_FREQ_120M_SUPPORTED=y CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y @@ -427,10 +432,10 @@ CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY=y CONFIG_SOC_PM_CPU_RETENTION_BY_SW=y CONFIG_SOC_PM_MODEM_RETENTION_BY_REGDMA=y CONFIG_SOC_EXT_MEM_CACHE_TAG_IN_CPU_DOMAIN=y -CONFIG_SOC_PM_TOP_PD_NOT_ALLOWED=y CONFIG_SOC_PM_PAU_LINK_NUM=5 CONFIG_SOC_PM_PAU_REGDMA_LINK_CONFIGURABLE=y CONFIG_SOC_PM_PAU_REGDMA_LINK_IDX_WIFIMAC=4 +CONFIG_SOC_PM_PAU_REGDMA_COMMON_PHY_LINK_ENTRY=y CONFIG_SOC_PM_PMU_MIN_SLP_SLOW_CLK_CYCLE_FIXED=y CONFIG_SOC_PM_RETENTION_MODULE_NUM=32 CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y @@ -451,6 +456,7 @@ CONFIG_SOC_WIFI_HW_TSF=y CONFIG_SOC_WIFI_FTM_SUPPORT=y CONFIG_SOC_WIFI_GCMP_SUPPORT=y CONFIG_SOC_WIFI_WAPI_SUPPORT=y +CONFIG_SOC_WIFI_TXOP_SUPPORT=y CONFIG_SOC_WIFI_CSI_SUPPORT=y CONFIG_SOC_WIFI_MESH_SUPPORT=y CONFIG_SOC_WIFI_HE_SUPPORT=y @@ -465,6 +471,7 @@ CONFIG_SOC_BLE_POWER_CONTROL_SUPPORTED=y CONFIG_SOC_BLE_MULTI_CONN_OPTIMIZATION=y CONFIG_SOC_BLE_PERIODIC_ADV_ENH_SUPPORTED=y CONFIG_SOC_BLE_CTE_SUPPORTED=y +CONFIG_SOC_BLE_PERIODIC_ADV_WITH_RESPONSE=y CONFIG_SOC_PHY_CALIBRATION_CLOCK_IS_INDEPENDENT=y CONFIG_SOC_LP_CORE_SINGLE_INTERRUPT_VECTOR=y CONFIG_SOC_LP_CORE_SUPPORT_ETM=y @@ -476,7 +483,7 @@ CONFIG_IDF_TOOLCHAIN_GCC=y CONFIG_IDF_TARGET_ARCH_RISCV=y CONFIG_IDF_TARGET_ARCH="riscv" CONFIG_IDF_TARGET="esp32c5" -CONFIG_IDF_INIT_VERSION="5.5.0" +CONFIG_IDF_INIT_VERSION="5.5.3" CONFIG_IDF_TARGET_ESP32C5=y CONFIG_IDF_FIRMWARE_CHIP_ID=0x0017 @@ -620,6 +627,7 @@ CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC=y CONFIG_ESP_ROM_CLIC_INT_THRESH_PATCH=y CONFIG_ESP_ROM_HAS_SUBOPTIMAL_NEWLIB_ON_MISALIGNED_MEMORY=y CONFIG_ESP_ROM_DELAY_US_PATCH=y +CONFIG_ESP_ROM_SUPPORT_SECURE_BOOT_FAST_WAKEUP=y # # Boot ROM Behavior @@ -630,6 +638,13 @@ CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y # CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set # end of Boot ROM Behavior +# +# ESP-TEE (Trusted Execution Environment) +# +# CONFIG_SECURE_ENABLE_TEE is not set +CONFIG_SECURE_TEE_LOG_LEVEL=0 +# end of ESP-TEE (Trusted Execution Environment) + # # Serial flasher config # @@ -744,29 +759,31 @@ CONFIG_BT_CONTROLLER_ENABLED=y # # NimBLE Options # + +# +# General +# CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y # CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_EXTERNAL is not set # CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set -# CONFIG_BT_NIMBLE_LOG_LEVEL_NONE is not set -# CONFIG_BT_NIMBLE_LOG_LEVEL_ERROR is not set -# CONFIG_BT_NIMBLE_LOG_LEVEL_WARNING is not set -CONFIG_BT_NIMBLE_LOG_LEVEL_INFO=y -# CONFIG_BT_NIMBLE_LOG_LEVEL_DEBUG is not set -CONFIG_BT_NIMBLE_LOG_LEVEL=1 -CONFIG_BT_NIMBLE_MAX_CONNECTIONS=3 -CONFIG_BT_NIMBLE_MAX_BONDS=3 -CONFIG_BT_NIMBLE_MAX_CCCDS=8 -CONFIG_BT_NIMBLE_L2CAP_COC_MAX_NUM=0 CONFIG_BT_NIMBLE_PINNED_TO_CORE=0 CONFIG_BT_NIMBLE_HOST_TASK_STACK_SIZE=4096 +# end of General + +# +# Roles and Profiles +# CONFIG_BT_NIMBLE_ROLE_CENTRAL=y CONFIG_BT_NIMBLE_ROLE_PERIPHERAL=y CONFIG_BT_NIMBLE_ROLE_BROADCASTER=y CONFIG_BT_NIMBLE_ROLE_OBSERVER=y CONFIG_BT_NIMBLE_GATT_CLIENT=y CONFIG_BT_NIMBLE_GATT_SERVER=y -# CONFIG_BT_NIMBLE_NVS_PERSIST is not set -# CONFIG_BT_NIMBLE_SMP_ID_RESET is not set +# end of Roles and Profiles + +# +# Security (SMP) +# CONFIG_BT_NIMBLE_SECURITY_ENABLE=y CONFIG_BT_NIMBLE_SM_LEGACY=y CONFIG_BT_NIMBLE_SM_SC=y @@ -774,14 +791,45 @@ CONFIG_BT_NIMBLE_SM_SC=y CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_ENCRYPTION=y CONFIG_BT_NIMBLE_SM_LVL=0 CONFIG_BT_NIMBLE_SM_SC_ONLY=0 -CONFIG_BT_NIMBLE_PRINT_ERR_NAME=y -# CONFIG_BT_NIMBLE_DEBUG is not set -# CONFIG_BT_NIMBLE_DYNAMIC_SERVICE is not set -CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" -CONFIG_BT_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +# CONFIG_BT_NIMBLE_SMP_ID_RESET is not set +# CONFIG_BT_NIMBLE_NVS_PERSIST is not set +CONFIG_BT_NIMBLE_MAX_BONDS=3 +# CONFIG_BT_NIMBLE_HANDLE_REPEAT_PAIRING_DELETION is not set +# end of Security (SMP) + +# +# GAP +# +CONFIG_BT_NIMBLE_RPA_TIMEOUT=900 +CONFIG_BT_NIMBLE_WHITELIST_SIZE=12 +CONFIG_BT_NIMBLE_ENABLE_CONN_REATTEMPT=y +CONFIG_BT_NIMBLE_MAX_CONN_REATTEMPT=3 +CONFIG_BT_NIMBLE_HS_PVCY=y +# CONFIG_BT_NIMBLE_HOST_ALLOW_CONNECT_WITH_SCAN is not set +# CONFIG_BT_NIMBLE_HOST_QUEUE_CONG_CHECK is not set +CONFIG_BT_NIMBLE_MAX_CONNECTIONS=3 +CONFIG_BT_NIMBLE_MAX_CCCDS=8 +CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS=y +CONFIG_BT_NIMBLE_HS_STOP_TIMEOUT_MS=2000 +CONFIG_BT_NIMBLE_USE_ESP_TIMER=y +# end of GAP + +# +# GATT / ATT +# CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU=256 CONFIG_BT_NIMBLE_ATT_MAX_PREP_ENTRIES=64 -CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE=0 +CONFIG_BT_NIMBLE_GATT_MAX_PROCS=4 +# CONFIG_BT_NIMBLE_BLE_GATT_BLOB_TRANSFER is not set +# CONFIG_BT_NIMBLE_GATT_CACHING is not set +# CONFIG_BT_NIMBLE_INCL_SVC_DISCOVERY is not set +# end of GATT / ATT + +# +# L2CAP +# +CONFIG_BT_NIMBLE_L2CAP_COC_MAX_NUM=0 +# end of L2CAP # # Memory Settings @@ -799,14 +847,9 @@ CONFIG_BT_NIMBLE_TRANSPORT_EVT_DISCARD_COUNT=8 CONFIG_BT_NIMBLE_L2CAP_COC_SDU_BUFF_COUNT=1 # end of Memory Settings -CONFIG_BT_NIMBLE_GATT_MAX_PROCS=4 -CONFIG_BT_NIMBLE_RPA_TIMEOUT=900 -# CONFIG_BT_NIMBLE_MESH is not set -CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS=y -CONFIG_BT_NIMBLE_HS_STOP_TIMEOUT_MS=2000 -CONFIG_BT_NIMBLE_ENABLE_CONN_REATTEMPT=y -CONFIG_BT_NIMBLE_MAX_CONN_REATTEMPT=3 -# CONFIG_BT_NIMBLE_HANDLE_REPEAT_PAIRING_DELETION is not set +# +# BLE 5.x Features +# CONFIG_BT_NIMBLE_50_FEATURE_SUPPORT=y CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_2M_PHY=y CONFIG_BT_NIMBLE_LL_CFG_FEAT_LE_CODED_PHY=y @@ -817,16 +860,11 @@ CONFIG_BT_NIMBLE_MAX_PERIODIC_SYNCS=0 CONFIG_BT_NIMBLE_MAX_PERIODIC_ADVERTISER_LIST=5 # CONFIG_BT_NIMBLE_BLE_POWER_CONTROL is not set # CONFIG_BT_NIMBLE_AOA_AOD is not set -# CONFIG_BT_NIMBLE_GATT_CACHING is not set -# CONFIG_BT_NIMBLE_INCL_SVC_DISCOVERY is not set -CONFIG_BT_NIMBLE_WHITELIST_SIZE=12 -# CONFIG_BT_NIMBLE_TEST_THROUGHPUT_TEST is not set -# CONFIG_BT_NIMBLE_BLUFI_ENABLE is not set -CONFIG_BT_NIMBLE_USE_ESP_TIMER=y -# CONFIG_BT_NIMBLE_BLE_GATT_BLOB_TRANSFER is not set +# CONFIG_BT_NIMBLE_ISO is not set +# end of BLE 5.x Features # -# BLE Services +# Services # CONFIG_BT_NIMBLE_PROX_SERVICE=y CONFIG_BT_NIMBLE_ANS_SERVICE=y @@ -851,6 +889,19 @@ CONFIG_BT_NIMBLE_DIS_SERVICE=y # CONFIG_BT_NIMBLE_SVC_DIS_PNP_ID is not set # CONFIG_BT_NIMBLE_SVC_DIS_INCLUDED is not set CONFIG_BT_NIMBLE_GAP_SERVICE=y +CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" +CONFIG_BT_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE=0 +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM=0 +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_ENC=0 +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_AUTHEN=0 +CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_AUTHOR=0 +# CONFIG_BT_NIMBLE_SVC_GAP_GATT_SECURITY_LEVEL is not set +# CONFIG_BT_NIMBLE_SVC_GAP_RPA_ONLY is not set +CONFIG_BT_NIMBLE_SVC_GAP_CAR_CHAR_NOT_SUPP=y +# CONFIG_BT_NIMBLE_SVC_GAP_CAR_NOT_SUPP is not set +# CONFIG_BT_NIMBLE_SVC_GAP_CAR_SUPP is not set +CONFIG_BT_NIMBLE_SVC_GAP_CENT_ADDR_RESOLUTION=-1 # # GAP Appearance write permissions @@ -862,11 +913,6 @@ CONFIG_BT_NIMBLE_SVC_GAP_APPEAR_WRITE_PERM_ATHN=0 CONFIG_BT_NIMBLE_SVC_GAP_APPEAR_WRITE_PERM_ATHR=0 # end of GAP Appearance write permissions -CONFIG_BT_NIMBLE_SVC_GAP_CAR_CHAR_NOT_SUPP=y -# CONFIG_BT_NIMBLE_SVC_GAP_CAR_NOT_SUPP is not set -# CONFIG_BT_NIMBLE_SVC_GAP_CAR_SUPP is not set -CONFIG_BT_NIMBLE_SVC_GAP_CENT_ADDR_RESOLUTION=-1 - # # GAP device name write permissions # @@ -881,23 +927,34 @@ CONFIG_BT_NIMBLE_SVC_GAP_PPCP_MIN_CONN_INTERVAL=0 CONFIG_BT_NIMBLE_SVC_GAP_PPCP_SLAVE_LATENCY=0 CONFIG_BT_NIMBLE_SVC_GAP_PPCP_SUPERVISION_TMO=0 # end of Peripheral Preferred Connection Parameters (PPCP) settings +# end of Services -CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM=0 -CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_ENC=0 -CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_AUTHEN=0 -CONFIG_BT_NIMBLE_SVC_GAP_NAME_WRITE_PERM_AUTHOR=0 -# CONFIG_BT_NIMBLE_SVC_GAP_GATT_SECURITY_LEVEL is not set -# CONFIG_BT_NIMBLE_SVC_GAP_RPA_ONLY is not set -# end of BLE Services - -# CONFIG_BT_NIMBLE_VS_SUPPORT is not set -# CONFIG_BT_NIMBLE_OPTIMIZE_MULTI_CONN is not set +# +# Extra Features +# +# CONFIG_BT_NIMBLE_DYNAMIC_SERVICE is not set +# CONFIG_BT_NIMBLE_BLUFI_ENABLE is not set # CONFIG_BT_NIMBLE_ENC_ADV_DATA is not set -# CONFIG_BT_NIMBLE_HIGH_DUTY_ADV_ITVL is not set -# CONFIG_BT_NIMBLE_HOST_ALLOW_CONNECT_WITH_SCAN is not set -# CONFIG_BT_NIMBLE_HOST_QUEUE_CONG_CHECK is not set +# CONFIG_BT_NIMBLE_ADV_UUID_CONCAT is not set # CONFIG_BT_NIMBLE_GATTC_PROC_PREEMPTION_PROTECT is not set # CONFIG_BT_NIMBLE_GATTC_AUTO_PAIR is not set +CONFIG_BT_NIMBLE_EATT_CHAN_NUM=0 +# CONFIG_BT_NIMBLE_SUBRATE is not set +# CONFIG_BT_NIMBLE_STATIC_PASSKEY is not set +CONFIG_BT_NIMBLE_DTM_MODE_TEST=y +CONFIG_BT_NIMBLE_MEM_OPTIMIZATION=y +CONFIG_BT_NIMBLE_STATIC_TO_DYNAMIC=y +CONFIG_BT_NIMBLE_SM_SIGN_CNT=y +CONFIG_BT_NIMBLE_CPFD_CAFD=y +CONFIG_BT_NIMBLE_RECONFIG_MTU=y +# CONFIG_BT_NIMBLE_LOW_SPEED_MODE is not set +# end of Extra Features + +# +# NimBLE Mesh +# +# CONFIG_BT_NIMBLE_MESH is not set +# end of NimBLE Mesh # # Host-controller Transport @@ -909,8 +966,38 @@ CONFIG_BT_NIMBLE_HCI_UART_RTS_PIN=19 CONFIG_BT_NIMBLE_HCI_UART_CTS_PIN=23 # end of Host-controller Transport -CONFIG_BT_NIMBLE_EATT_CHAN_NUM=0 -# CONFIG_BT_NIMBLE_SUBRATE is not set +# +# Debugging/Testing +# +# CONFIG_BT_NIMBLE_MEM_DEBUG is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_NONE is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_ERROR is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_WARNING is not set +CONFIG_BT_NIMBLE_LOG_LEVEL_INFO=y +# CONFIG_BT_NIMBLE_LOG_LEVEL_DEBUG is not set +CONFIG_BT_NIMBLE_LOG_LEVEL=1 +CONFIG_BT_NIMBLE_PRINT_ERR_NAME=y +# CONFIG_BT_NIMBLE_DEBUG is not set +# CONFIG_BT_NIMBLE_TEST_THROUGHPUT_TEST is not set +# end of Debugging/Testing + +# +# Vendor / Optimization +# +# CONFIG_BT_NIMBLE_VS_SUPPORT is not set +# CONFIG_BT_NIMBLE_OPTIMIZE_MULTI_CONN is not set +# CONFIG_BT_NIMBLE_HIGH_DUTY_ADV_ITVL is not set +# CONFIG_BT_NIMBLE_ADV_SEND_CONSTANT_DID is not set +# CONFIG_BT_NIMBLE_SCAN_ALLOW_ENH_ADI_FILTER is not set +# end of Vendor / Optimization + +# +# Helper Utils +# +CONFIG_BT_NIMBLE_CHK_HOST_STATUS=y +CONFIG_BT_NIMBLE_UTIL_API=y +CONFIG_BT_NIMBLE_EXTRA_ADV_FIELDS=y +# end of Helper Utils # end of NimBLE Options # @@ -1001,14 +1088,44 @@ CONFIG_BT_LE_CONN_RESERVED_MEMORY_COUNT=2 # end of Reserved Memory Config # CONFIG_BT_LE_DTM_ENABLED is not set + +# +# Scheduling Priority Level Config +# +CONFIG_BT_LE_ADV_SCHED_PRIO_LOW_LEVEL=y +# CONFIG_BT_LE_ADV_SCHED_PRIO_MID_LEVEL is not set +# CONFIG_BT_LE_ADV_SCHED_PRIO_HIGH_LEVEL is not set +CONFIG_BT_LE_DFT_ADV_SCHED_PRIO_LEVEL=0 +# CONFIG_BT_LE_PERIODIC_ADV_SCHED_PRIO_LOW_LEVEL is not set +CONFIG_BT_LE_PERIODIC_ADV_SCHED_PRIO_MID_LEVEL=y +# CONFIG_BT_LE_PERIODIC_ADV_SCHED_PRIO_HIGH_LEVEL is not set +CONFIG_BT_LE_DFT_PERIODIC_ADV_SCHED_PRIO_LEVEL=1 +# CONFIG_BT_LE_SYNC_SCHED_PRIO_LOW_LEVEL is not set +CONFIG_BT_LE_SYNC_SCHED_PRIO_MID_LEVEL=y +# CONFIG_BT_LE_SYNC_SCHED_PRIO_HIGH_LEVEL is not set +CONFIG_BT_LE_DFT_SYNC_SCHED_PRIO_LEVEL=1 +# end of Scheduling Priority Level Config + +# CONFIG_BT_LE_CTRL_SLV_FAST_RX_CONN_DATA_EN is not set +# CONFIG_BT_LE_CTRL_DL_ITVL_PHY_SYNC_EN is not set # end of Controller Options # # Common Options # CONFIG_BT_ALARM_MAX_NUM=50 +CONFIG_BT_SMP_CRYPTO_STACK_TINYCRYPT=y +# CONFIG_BT_SMP_CRYPTO_STACK_MBEDTLS is not set + +# +# BLE Log +# +# CONFIG_BLE_LOG_ENABLED is not set +# end of BLE Log + # CONFIG_BT_BLE_LOG_SPI_OUT_ENABLED is not set # CONFIG_BT_BLE_LOG_UHCI_OUT_ENABLED is not set +# CONFIG_BT_LE_USED_MEM_STATISTICS_ENABLED is not set # end of Common Options # CONFIG_BT_HCI_LOG_DEBUG_EN is not set @@ -1158,10 +1275,10 @@ CONFIG_ANA_CMPR_OBJ_CACHE_SAFE=y # end of ESP-Driver:Analog Comparator Configurations # -# BitScrambler Configurations +# ESP-Driver:BitScrambler Configurations # # CONFIG_BITSCRAMBLER_CTRL_FUNC_IN_IRAM is not set -# end of BitScrambler Configurations +# end of ESP-Driver:BitScrambler Configurations # # ESP-Driver:GPIO Configurations @@ -1272,6 +1389,7 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y # ESP-Driver:TWAI Configurations # # CONFIG_TWAI_ISR_IN_IRAM is not set +# CONFIG_TWAI_IO_FUNC_IN_IRAM is not set # CONFIG_TWAI_ISR_CACHE_SAFE is not set # CONFIG_TWAI_ENABLE_DEBUG_LOG is not set # end of ESP-Driver:TWAI Configurations @@ -1374,11 +1492,13 @@ CONFIG_ESP_HTTPS_SERVER_EVENT_POST_TIMEOUT=2000 # # Hardware Settings # +CONFIG_ESP_HW_SUPPORT_FUNC_IN_IRAM=y # # Chip revision # CONFIG_ESP32C5_REV_MIN_100=y +# CONFIG_ESP32C5_REV_MIN_102 is not set CONFIG_ESP32C5_REV_MIN_FULL=100 CONFIG_ESP_REV_MIN_FULL=100 @@ -1433,6 +1553,8 @@ CONFIG_RTC_CLK_SRC_INT_RC=y CONFIG_RTC_CLK_CAL_CYCLES=1024 CONFIG_RTC_FAST_CLK_SRC_RC_FAST=y # CONFIG_RTC_FAST_CLK_SRC_XTAL is not set +CONFIG_RTC_CLK_FUNC_IN_IRAM=y +CONFIG_RTC_TIME_FUNC_IN_IRAM=y # end of RTC Clock Config # @@ -1570,6 +1692,7 @@ CONFIG_SPIRAM_BOOT_HW_INIT=y CONFIG_SPIRAM_BOOT_INIT=y CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION=y # CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +# CONFIG_SPIRAM_USE_MEMMAP is not set CONFIG_SPIRAM_USE_CAPS_ALLOC=y # CONFIG_SPIRAM_USE_MALLOC is not set CONFIG_SPIRAM_MEMTEST=y @@ -1761,10 +1884,10 @@ CONFIG_ESP_WIFI_TX_HETB_QUEUE_NUM=3 # # CONFIG_ESP_WIFI_WPS_STRICT is not set # CONFIG_ESP_WIFI_WPS_PASSPHRASE is not set +# CONFIG_ESP_WIFI_WPS_RECONNECT_ON_FAIL is not set # end of WPS Configuration Options # CONFIG_ESP_WIFI_DEBUG_PRINT is not set -# CONFIG_ESP_WIFI_TESTING_OPTIONS is not set CONFIG_ESP_WIFI_ENTERPRISE_SUPPORT=y # CONFIG_ESP_WIFI_ENT_FREE_DYNAMIC_BUFFER is not set # end of Wi-Fi @@ -1945,6 +2068,7 @@ CONFIG_IEEE802154_CCA_MODE=1 CONFIG_IEEE802154_CCA_THRESHOLD=-60 CONFIG_IEEE802154_PENDING_TABLE_SIZE=20 # CONFIG_IEEE802154_MULTI_PAN_ENABLE is not set +CONFIG_IEEE802154_INTERFACE_NUM=1 CONFIG_IEEE802154_TIMING_OPTIMIZATION=y # CONFIG_IEEE802154_DEBUG is not set # CONFIG_IEEE802154_DEBUG_ASSERT_MONITOR is not set @@ -2119,6 +2243,7 @@ CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 CONFIG_LWIP_IPV6_ND6_NUM_PREFIXES=5 CONFIG_LWIP_IPV6_ND6_NUM_ROUTERS=3 CONFIG_LWIP_IPV6_ND6_NUM_DESTINATIONS=10 +# CONFIG_LWIP_IPV6_ND6_ROUTE_INFO_OPTION_SUPPORT is not set # CONFIG_LWIP_PPP_SUPPORT is not set # CONFIG_LWIP_SLIP_SUPPORT is not set @@ -2390,6 +2515,8 @@ CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT=y # # CONFIG_OPENTHREAD_SPINEL_ONLY is not set # end of OpenThread Spinel + +# CONFIG_OPENTHREAD_DEBUG is not set # end of OpenThread # @@ -3106,10 +3233,6 @@ CONFIG_NIMBLE_ENABLED=y CONFIG_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y # CONFIG_NIMBLE_MEM_ALLOC_MODE_EXTERNAL is not set # CONFIG_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set -CONFIG_NIMBLE_MAX_CONNECTIONS=3 -CONFIG_NIMBLE_MAX_BONDS=3 -CONFIG_NIMBLE_MAX_CCCDS=8 -CONFIG_NIMBLE_L2CAP_COC_MAX_NUM=0 CONFIG_NIMBLE_PINNED_TO_CORE=0 CONFIG_NIMBLE_TASK_STACK_SIZE=4096 CONFIG_BT_NIMBLE_TASK_STACK_SIZE=4096 @@ -3117,25 +3240,29 @@ CONFIG_NIMBLE_ROLE_CENTRAL=y CONFIG_NIMBLE_ROLE_PERIPHERAL=y CONFIG_NIMBLE_ROLE_BROADCASTER=y CONFIG_NIMBLE_ROLE_OBSERVER=y -# CONFIG_NIMBLE_NVS_PERSIST is not set CONFIG_NIMBLE_SM_LEGACY=y CONFIG_NIMBLE_SM_SC=y # CONFIG_NIMBLE_SM_SC_DEBUG_KEYS is not set CONFIG_BT_NIMBLE_SM_SC_LVL=0 -# CONFIG_NIMBLE_DEBUG is not set -CONFIG_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" -CONFIG_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +# CONFIG_NIMBLE_NVS_PERSIST is not set +CONFIG_NIMBLE_MAX_BONDS=3 +CONFIG_NIMBLE_RPA_TIMEOUT=900 +CONFIG_NIMBLE_MAX_CONNECTIONS=3 +CONFIG_NIMBLE_MAX_CCCDS=8 +CONFIG_NIMBLE_CRYPTO_STACK_MBEDTLS=y CONFIG_NIMBLE_ATT_PREFERRED_MTU=256 -CONFIG_NIMBLE_SVC_GAP_APPEARANCE=0 +CONFIG_NIMBLE_L2CAP_COC_MAX_NUM=0 CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT=12 CONFIG_BT_NIMBLE_ACL_BUF_COUNT=24 CONFIG_BT_NIMBLE_ACL_BUF_SIZE=255 CONFIG_BT_NIMBLE_HCI_EVT_BUF_SIZE=70 CONFIG_BT_NIMBLE_HCI_EVT_HI_BUF_COUNT=30 CONFIG_BT_NIMBLE_HCI_EVT_LO_BUF_COUNT=8 -CONFIG_NIMBLE_RPA_TIMEOUT=900 +CONFIG_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" +CONFIG_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +CONFIG_NIMBLE_SVC_GAP_APPEARANCE=0 # CONFIG_NIMBLE_MESH is not set -CONFIG_NIMBLE_CRYPTO_STACK_MBEDTLS=y +# CONFIG_NIMBLE_DEBUG is not set # CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_EN is not set CONFIG_BT_NIMBLE_COEX_PHY_CODED_TX_RX_TLIM_DIS=y CONFIG_SW_COEXIST_ENABLE=y @@ -3215,7 +3342,6 @@ CONFIG_WPA_MBEDTLS_TLS_CLIENT=y # CONFIG_WPA_WPS_SOFTAP_REGISTRAR is not set # CONFIG_WPA_WPS_STRICT is not set # CONFIG_WPA_DEBUG_PRINT is not set -# CONFIG_WPA_TESTING_OPTIONS is not set # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y diff --git a/firmware_p4/partitions.csv b/firmware_p4/partitions.csv index b702bbfb..25a5530b 100644 --- a/firmware_p4/partitions.csv +++ b/firmware_p4/partitions.csv @@ -4,5 +4,5 @@ otadata, data, ota, , 8K, phy_init, data, phy, , 4K, ota_0, app, ota_0, 0x20000, 4M, ota_1, app, ota_1, , 4M, -storage, data, fat, , 3M, -assets, data, littlefs, , 4M, +storage, data, fat, , 6M, +assets, data, littlefs, , 16M, diff --git a/firmware_p4/sdkconfig b/firmware_p4/sdkconfig index 01ef8866..bfdcf6da 100644 --- a/firmware_p4/sdkconfig +++ b/firmware_p4/sdkconfig @@ -647,6 +647,9 @@ CONFIG_BOOTLOADER_LOG_MODE_TEXT=y # # CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y +CONFIG_BOOTLOADER_FLASH_32BIT_ADDR=y +CONFIG_BOOTLOADER_FLASH_NEEDS_32BIT_FEAT=y +CONFIG_BOOTLOADER_FLASH_NEEDS_32BIT_ADDR_QUAD_FLASH=y # end of Serial Flash Configurations # CONFIG_BOOTLOADER_FACTORY_RESET is not set @@ -726,19 +729,20 @@ CONFIG_ESPTOOLPY_FLASHMODE_DIO=y # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y CONFIG_ESPTOOLPY_FLASHMODE="dio" -CONFIG_ESPTOOLPY_FLASHFREQ_40M=y +CONFIG_ESPTOOLPY_FLASHFREQ_80M=y +# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set -CONFIG_ESPTOOLPY_FLASHFREQ_VAL=40 -CONFIG_ESPTOOLPY_FLASHFREQ="40m" +CONFIG_ESPTOOLPY_FLASHFREQ_VAL=80 +CONFIG_ESPTOOLPY_FLASHFREQ="80m" # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y -# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_32MB=y # CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set -CONFIG_ESPTOOLPY_FLASHSIZE="16MB" +CONFIG_ESPTOOLPY_FLASHSIZE="32MB" # CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set CONFIG_ESPTOOLPY_BEFORE_RESET=y # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set @@ -1251,11 +1255,11 @@ CONFIG_ESP_HW_SUPPORT_FUNC_IN_IRAM=y # Read the help text of the option below for explanation # CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y -CONFIG_ESP32P4_REV_MIN_0=y -# CONFIG_ESP32P4_REV_MIN_1 is not set +# CONFIG_ESP32P4_REV_MIN_0 is not set +CONFIG_ESP32P4_REV_MIN_1=y # CONFIG_ESP32P4_REV_MIN_100 is not set -CONFIG_ESP32P4_REV_MIN_FULL=0 -CONFIG_ESP_REV_MIN_FULL=0 +CONFIG_ESP32P4_REV_MIN_FULL=1 +CONFIG_ESP_REV_MIN_FULL=1 # # Maximum Supported ESP32-P4 Revision (Rev v1.99) From aea89345339f9e84d28a94c5f7f10f8e8f75da52 Mon Sep 17 00:00:00 2001 From: Ghost <2643782046@qq.com> Date: Tue, 24 Mar 2026 00:45:49 +0800 Subject: [PATCH 4/4] fix(drivers): migrate I2C drivers to new esp_driver_i2c API Replace deprecated driver/i2c.h with driver/i2c_master.h across all I2C-related components to fix build errors on ESP-IDF v5.5.3. - i2c_init: use i2c_new_master_bus() and expose i2c_get_bus_handle() - bq25896: register device via i2c_master_bus_add_device(), replace cmd_link pattern with i2c_master_transmit / transmit_receive - pn7150: same migration as bq25896; pn7150_i2c_init now reuses the global bus handle instead of re-initializing the bus - kernel: remove direct include of deprecated driver/i2c.h --- firmware_p4/components/Core/kernel.c | 2 +- .../components/Drivers/bq25896/bq25896.c | 204 ++++++++++-------- .../Drivers/bq25896/include/bq25896.h | 2 +- .../components/Drivers/i2c_init/i2c_init.c | 37 ++-- .../Drivers/i2c_init/include/i2c_init.h | 4 + .../Drivers/pn7150/include/pn7150.h | 3 +- .../components/Drivers/pn7150/pn7150.c | 77 ++++--- 7 files changed, 179 insertions(+), 150 deletions(-) diff --git a/firmware_p4/components/Core/kernel.c b/firmware_p4/components/Core/kernel.c index ebea315f..1c58d90e 100644 --- a/firmware_p4/components/Core/kernel.c +++ b/firmware_p4/components/Core/kernel.c @@ -26,7 +26,7 @@ #include "pin_def.h" #include "st7789.h" #include "bq25896.h" -#include "driver/i2c.h" +#include "driver/i2c_master.h" #include "nvs_flash.h" #include "wifi_service.h" #include "storage_init.h" diff --git a/firmware_p4/components/Drivers/bq25896/bq25896.c b/firmware_p4/components/Drivers/bq25896/bq25896.c index 15ef08fd..a8e14bfe 100644 --- a/firmware_p4/components/Drivers/bq25896/bq25896.c +++ b/firmware_p4/components/Drivers/bq25896/bq25896.c @@ -12,154 +12,178 @@ // See the License for the specific language governing permissions and // limitations under the License. - #include "bq25896.h" -#include "driver/i2c.h" +#include "driver/i2c_master.h" #include "esp_log.h" +#include "i2c_init.h" #include -#define I2C_PORT I2C_NUM_0 +#define I2C_MASTER_TIMEOUT_MS 100 // Endereço I2C do BQ25896 #define BQ25896_I2C_ADDR 0x6B // Definições dos Registradores -#define REG_ILIM 0x00 -#define REG_VINDPM 0x01 -#define REG_ADC_CTRL 0x02 -#define REG_CHG_CTRL_0 0x03 -#define REG_ICHG 0x04 -#define REG_IPRE_ITERM 0x05 -#define REG_VREG 0x06 -#define REG_CHG_CTRL_1 0x07 -#define REG_CHG_TIMER 0x08 -#define REG_BAT_COMP 0x09 -#define REG_CHG_CTRL_2 0x0A -#define REG_STATUS 0x0B -#define REG_FAULT 0x0C -#define REG_VINDPM_OS 0x0D -#define REG_BAT_VOLT 0x0E -#define REG_SYS_VOLT 0x0F -#define REG_TS_ADC 0x10 -#define REG_VBUS_ADC 0x11 -#define REG_ICHG_ADC 0x12 -#define REG_IDPM_ADC 0x13 -#define REG_CTRL_3 0x14 +#define REG_ILIM 0x00 +#define REG_VINDPM 0x01 +#define REG_ADC_CTRL 0x02 +#define REG_CHG_CTRL_0 0x03 +#define REG_ICHG 0x04 +#define REG_IPRE_ITERM 0x05 +#define REG_VREG 0x06 +#define REG_CHG_CTRL_1 0x07 +#define REG_CHG_TIMER 0x08 +#define REG_BAT_COMP 0x09 +#define REG_CHG_CTRL_2 0x0A +#define REG_STATUS 0x0B +#define REG_FAULT 0x0C +#define REG_VINDPM_OS 0x0D +#define REG_BAT_VOLT 0x0E +#define REG_SYS_VOLT 0x0F +#define REG_TS_ADC 0x10 +#define REG_VBUS_ADC 0x11 +#define REG_ICHG_ADC 0x12 +#define REG_IDPM_ADC 0x13 +#define REG_CTRL_3 0x14 // Máscaras para o Registrador de Status (0x0B) -#define STATUS_VBUS_STAT_MASK 0b11100000 +#define STATUS_VBUS_STAT_MASK 0b11100000 #define STATUS_VBUS_STAT_SHIFT 5 -#define STATUS_CHG_STAT_MASK 0b00011000 -#define STATUS_CHG_STAT_SHIFT 3 -#define STATUS_PG_STAT_MASK 0b00000100 -#define STATUS_PG_STAT_SHIFT 2 -#define STATUS_VSYS_STAT_MASK 0b00000001 +#define STATUS_CHG_STAT_MASK 0b00011000 +#define STATUS_CHG_STAT_SHIFT 3 +#define STATUS_PG_STAT_MASK 0b00000100 +#define STATUS_PG_STAT_SHIFT 2 +#define STATUS_VSYS_STAT_MASK 0b00000001 // Máscaras do ADC (0x02) #define ADC_CTRL_CONV_RATE_MASK 0b10000000 -#define ADC_CTRL_ADC_EN_MASK 0b01000000 +#define ADC_CTRL_ADC_EN_MASK 0b01000000 // Máscara para tensão da bateria #define BATV_MASK 0b01111111 static const char *TAG = "BQ25896"; +static i2c_master_dev_handle_t bq25896_dev_handle = NULL; + +static esp_err_t bq25896_ensure_device(void) { + if (bq25896_dev_handle != NULL) + return ESP_OK; + + i2c_master_bus_handle_t bus = i2c_get_bus_handle(); + if (bus == NULL) { + ESP_LOGE(TAG, "I2C bus não inicializado."); + return ESP_ERR_INVALID_STATE; + } + + i2c_device_config_t dev_cfg = { + .dev_addr_length = I2C_ADDR_BIT_LEN_7, + .device_address = BQ25896_I2C_ADDR, + .scl_speed_hz = 400000, + }; + return i2c_master_bus_add_device(bus, &dev_cfg, &bq25896_dev_handle); +} // Leitura de registrador static esp_err_t bq25896_read_reg(uint8_t reg, uint8_t *data) { - i2c_cmd_handle_t cmd = i2c_cmd_link_create(); - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (BQ25896_I2C_ADDR << 1) | I2C_MASTER_WRITE, true); - i2c_master_write_byte(cmd, reg, true); - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (BQ25896_I2C_ADDR << 1) | I2C_MASTER_READ, true); - i2c_master_read_byte(cmd, data, I2C_MASTER_LAST_NACK); - i2c_master_stop(cmd); - esp_err_t ret = i2c_master_cmd_begin(I2C_PORT, cmd, 100 / portTICK_PERIOD_MS); - i2c_cmd_link_delete(cmd); + esp_err_t ret = bq25896_ensure_device(); + if (ret != ESP_OK) return ret; + + return i2c_master_transmit_receive(bq25896_dev_handle, ®, 1, data, 1, + I2C_MASTER_TIMEOUT_MS); } // Escrita de registrador static esp_err_t bq25896_write_reg(uint8_t reg, uint8_t data) { - i2c_cmd_handle_t cmd = i2c_cmd_link_create(); - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (BQ25896_I2C_ADDR << 1) | I2C_MASTER_WRITE, true); - i2c_master_write_byte(cmd, reg, true); - i2c_master_write_byte(cmd, data, true); - i2c_master_stop(cmd); - esp_err_t ret = i2c_master_cmd_begin(I2C_PORT, cmd, 100 / portTICK_PERIOD_MS); - i2c_cmd_link_delete(cmd); + esp_err_t ret = bq25896_ensure_device(); + if (ret != ESP_OK) return ret; + + uint8_t buf[2] = {reg, data}; + return i2c_master_transmit(bq25896_dev_handle, buf, sizeof(buf), + I2C_MASTER_TIMEOUT_MS); } // Inicializa o BQ25896 esp_err_t bq25896_init(void) { - uint8_t data; - esp_err_t ret = bq25896_read_reg(REG_CTRL_3, &data); - if (ret != ESP_OK) { - ESP_LOGE(TAG, "Falha ao comunicar com o BQ25896."); - return ret; - } + esp_err_t ret = bq25896_ensure_device(); + if (ret != ESP_OK) { + ESP_LOGE(TAG, "Falha ao registrar BQ25896 no bus: %s", + esp_err_to_name(ret)); + return ret; + } - ret = bq25896_read_reg(REG_ADC_CTRL, &data); - if (ret != ESP_OK) return ret; + uint8_t data; + ret = bq25896_read_reg(REG_CTRL_3, &data); + if (ret != ESP_OK) { + ESP_LOGE(TAG, "Falha ao comunicar com o BQ25896."); + return ret; + } - data |= ADC_CTRL_ADC_EN_MASK; - data &= ~ADC_CTRL_CONV_RATE_MASK; + ret = bq25896_read_reg(REG_ADC_CTRL, &data); + if (ret != ESP_OK) + return ret; - ret = bq25896_write_reg(REG_ADC_CTRL, data); + data |= ADC_CTRL_ADC_EN_MASK; + data &= ~ADC_CTRL_CONV_RATE_MASK; - if (ret == ESP_OK) { - ESP_LOGI(TAG, "BQ25896 inicializado com sucesso."); - } + ret = bq25896_write_reg(REG_ADC_CTRL, data); - return ret; + if (ret == ESP_OK) { + ESP_LOGI(TAG, "BQ25896 inicializado com sucesso."); + } + + return ret; } // Retorna status de carregamento bq25896_charge_status_t bq25896_get_charge_status(void) { - uint8_t data = 0; - if (bq25896_read_reg(REG_STATUS, &data) == ESP_OK) { - uint8_t status = (data & STATUS_CHG_STAT_MASK) >> STATUS_CHG_STAT_SHIFT; - return (bq25896_charge_status_t)status; - } - return CHARGE_STATUS_NOT_CHARGING; + uint8_t data = 0; + if (bq25896_read_reg(REG_STATUS, &data) == ESP_OK) { + uint8_t status = (data & STATUS_CHG_STAT_MASK) >> STATUS_CHG_STAT_SHIFT; + return (bq25896_charge_status_t)status; + } + return CHARGE_STATUS_NOT_CHARGING; } // Retorna status do VBUS bq25896_vbus_status_t bq25896_get_vbus_status(void) { - uint8_t data = 0; - if (bq25896_read_reg(REG_STATUS, &data) == ESP_OK) { - uint8_t status = (data & STATUS_VBUS_STAT_MASK) >> STATUS_VBUS_STAT_SHIFT; - return (bq25896_vbus_status_t)status; - } - return VBUS_STATUS_UNKNOWN; + uint8_t data = 0; + if (bq25896_read_reg(REG_STATUS, &data) == ESP_OK) { + uint8_t status = (data & STATUS_VBUS_STAT_MASK) >> STATUS_VBUS_STAT_SHIFT; + return (bq25896_vbus_status_t)status; + } + return VBUS_STATUS_UNKNOWN; } // Verifica se está carregando bool bq25896_is_charging(void) { - bq25896_charge_status_t status = bq25896_get_charge_status(); - return (status == CHARGE_STATUS_PRECHARGE || status == CHARGE_STATUS_FAST_CHARGE); + bq25896_charge_status_t status = bq25896_get_charge_status(); + return (status == CHARGE_STATUS_PRECHARGE || + status == CHARGE_STATUS_FAST_CHARGE); } // Calcula porcentagem estimada da bateria int bq25896_get_battery_percentage(uint16_t voltage_mv) { - const int min_voltage = 3200; // 0% - const int max_voltage = 4200; // 100% + const int min_voltage = 3200; // 0% + const int max_voltage = 4200; // 100% - if (voltage_mv <= min_voltage) return 0; - if (voltage_mv >= max_voltage) return 100; + if (voltage_mv <= min_voltage) + return 0; + if (voltage_mv >= max_voltage) + return 100; - int percentage = ((voltage_mv - min_voltage) * 100) / (max_voltage - min_voltage); - return percentage > 100 ? 100 : percentage; + int percentage = + ((voltage_mv - min_voltage) * 100) / (max_voltage - min_voltage); + return percentage > 100 ? 100 : percentage; } // Retorna tensão da bateria uint16_t bq25896_get_battery_voltage(void) { - uint8_t data = 0; - if (bq25896_read_reg(REG_BAT_VOLT, &data) == ESP_OK) { - uint16_t voltage = 2304 + ((data & BATV_MASK) * 20); - return voltage; - } - return 0; + uint8_t data = 0; + if (bq25896_read_reg(REG_BAT_VOLT, &data) == ESP_OK) { + uint16_t voltage = 2304 + ((data & BATV_MASK) * 20); + return voltage; + } + return 0; } diff --git a/firmware_p4/components/Drivers/bq25896/include/bq25896.h b/firmware_p4/components/Drivers/bq25896/include/bq25896.h index ed54b07d..a5cbb3ef 100644 --- a/firmware_p4/components/Drivers/bq25896/include/bq25896.h +++ b/firmware_p4/components/Drivers/bq25896/include/bq25896.h @@ -16,7 +16,7 @@ #ifndef BQ25896_H #define BQ25896_H -#include "driver/i2c.h" +#include "driver/i2c_master.h" #include #include diff --git a/firmware_p4/components/Drivers/i2c_init/i2c_init.c b/firmware_p4/components/Drivers/i2c_init/i2c_init.c index 2e418ed1..ba1b5a59 100644 --- a/firmware_p4/components/Drivers/i2c_init/i2c_init.c +++ b/firmware_p4/components/Drivers/i2c_init/i2c_init.c @@ -13,32 +13,37 @@ // limitations under the License. -#include "driver/i2c.h" +#include "driver/i2c_master.h" #include "esp_log.h" +#include "i2c_init.h" #define TAG "I2CInit" +static i2c_master_bus_handle_t global_bus_handle = NULL; + void init_i2c(void) { - i2c_config_t conf = { - .mode = I2C_MODE_MASTER, + if (global_bus_handle != NULL) { + ESP_LOGI(TAG, "I2C bus já está inicializado."); + return; + } + + i2c_master_bus_config_t bus_config = { + .i2c_port = I2C_NUM_0, .sda_io_num = 8, .scl_io_num = 9, - .sda_pullup_en = GPIO_PULLUP_ENABLE, - .scl_pullup_en = GPIO_PULLUP_ENABLE, - .master.clk_speed = 400000, // 400 kHz + .clk_source = I2C_CLK_SRC_DEFAULT, + .glitch_ignore_cnt = 7, + .flags.enable_internal_pullup = true, }; - esp_err_t ret = i2c_param_config(I2C_NUM_0, &conf); - if (ret != ESP_OK) { - ESP_LOGE(TAG, "Erro em i2c_param_config: %s", esp_err_to_name(ret)); - return; - } - - ret = i2c_driver_install(I2C_NUM_0, I2C_MODE_MASTER, 0, 0, 0); + esp_err_t ret = i2c_new_master_bus(&bus_config, &global_bus_handle); if (ret != ESP_OK) { - ESP_LOGE(TAG, "Erro em i2c_driver_install: %s", esp_err_to_name(ret)); - return; + ESP_LOGE(TAG, "Erro ao inicializar i2c_new_master_bus: %s", esp_err_to_name(ret)); + } else { + ESP_LOGI(TAG, "I2C mestre inicializado com sucesso no I2C_NUM_0 usando o novo driver."); } +} - ESP_LOGI(TAG, "I2C mestre inicializado com sucesso no I2C_NUM_0."); +i2c_master_bus_handle_t i2c_get_bus_handle(void) { + return global_bus_handle; } diff --git a/firmware_p4/components/Drivers/i2c_init/include/i2c_init.h b/firmware_p4/components/Drivers/i2c_init/include/i2c_init.h index 52b630de..18206192 100644 --- a/firmware_p4/components/Drivers/i2c_init/include/i2c_init.h +++ b/firmware_p4/components/Drivers/i2c_init/include/i2c_init.h @@ -14,4 +14,8 @@ #pragma once + +#include "driver/i2c_master.h" + void init_i2c(void); +i2c_master_bus_handle_t i2c_get_bus_handle(void); diff --git a/firmware_p4/components/Drivers/pn7150/include/pn7150.h b/firmware_p4/components/Drivers/pn7150/include/pn7150.h index 2f02b2a7..5e7e7637 100644 --- a/firmware_p4/components/Drivers/pn7150/include/pn7150.h +++ b/firmware_p4/components/Drivers/pn7150/include/pn7150.h @@ -16,7 +16,8 @@ #ifndef PN7150_H #define PN7150_H -#include "driver/i2c.h" +#include "driver/i2c_master.h" +#include "i2c_init.h" #include "driver/gpio.h" // Configurações de hardware diff --git a/firmware_p4/components/Drivers/pn7150/pn7150.c b/firmware_p4/components/Drivers/pn7150/pn7150.c index 229afdf6..1471fe80 100644 --- a/firmware_p4/components/Drivers/pn7150/pn7150.c +++ b/firmware_p4/components/Drivers/pn7150/pn7150.c @@ -19,20 +19,34 @@ #include "freertos/task.h" static const char *TAG = "PN7150"; +static i2c_master_dev_handle_t pn7150_dev_handle = NULL; -// Inicializa I2C mestre do ESP32 +#define I2C_TIMEOUT_MS 1000 + +static esp_err_t pn7150_ensure_device(void) { + if (pn7150_dev_handle != NULL) return ESP_OK; + + i2c_master_bus_handle_t bus = i2c_get_bus_handle(); + if (bus == NULL) { + ESP_LOGE(TAG, "I2C bus não inicializado."); + return ESP_ERR_INVALID_STATE; + } + + i2c_device_config_t dev_cfg = { + .dev_addr_length = I2C_ADDR_BIT_LEN_7, + .device_address = PN7150_I2C_ADDRESS, + .scl_speed_hz = I2C_MASTER_FREQ_HZ, + }; + return i2c_master_bus_add_device(bus, &dev_cfg, &pn7150_dev_handle); +} + +// Inicializa I2C mestre do ESP32 (agora only registra o device no bus global) void pn7150_i2c_init(void) { - i2c_config_t conf = { - .mode = I2C_MODE_MASTER, - .sda_io_num = I2C_MASTER_SDA_IO, - .scl_io_num = I2C_MASTER_SCL_IO, - .sda_pullup_en = GPIO_PULLUP_ENABLE, - .scl_pullup_en = GPIO_PULLUP_ENABLE, - .master.clk_speed = I2C_MASTER_FREQ_HZ, - }; - i2c_param_config(I2C_MASTER_NUM, &conf); - i2c_driver_install(I2C_MASTER_NUM, conf.mode, 0, 0, 0); + esp_err_t ret = pn7150_ensure_device(); + if (ret != ESP_OK) { + ESP_LOGE(TAG, "Falha ao registrar PN7150 no bus I2C: %s", esp_err_to_name(ret)); + } } // Configura GPIOs VEN (output) e IRQ (input) do PN7150 @@ -61,31 +75,22 @@ void pn7150_hw_init(void) // Envia um comando NCI via I2C esp_err_t pn7150_send_cmd(const uint8_t *data, size_t len) { - i2c_cmd_handle_t cmd = i2c_cmd_link_create(); - // Inicia e envia endereço+escrita - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (PN7150_I2C_ADDRESS<<1) | I2C_MASTER_WRITE, true); - // Envia o comando NCI completo - i2c_master_write(cmd, (uint8_t*)data, len, true); - i2c_master_stop(cmd); - esp_err_t err = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, pdMS_TO_TICKS(1000)); - i2c_cmd_link_delete(cmd); - return err; + esp_err_t ret = pn7150_ensure_device(); + if (ret != ESP_OK) return ret; + + return i2c_master_transmit(pn7150_dev_handle, data, len, I2C_TIMEOUT_MS); } // Lê resposta NCI via I2C. Retorna em buffer e define *length. esp_err_t pn7150_read_rsp(uint8_t *buffer, size_t *length) { + esp_err_t ret = pn7150_ensure_device(); + if (ret != ESP_OK) return ret; + // Leitura de cabeçalho (3 bytes) uint8_t header[3] = {0}; - i2c_cmd_handle_t cmd = i2c_cmd_link_create(); - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (PN7150_I2C_ADDRESS<<1) | I2C_MASTER_READ, true); - i2c_master_read(cmd, header, 3, I2C_MASTER_LAST_NACK); - i2c_master_stop(cmd); - esp_err_t err = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, pdMS_TO_TICKS(1000)); - i2c_cmd_link_delete(cmd); - if (err != ESP_OK) return err; + ret = i2c_master_receive(pn7150_dev_handle, header, 3, I2C_TIMEOUT_MS); + if (ret != ESP_OK) return ret; // Calcula tamanho do payload uint8_t payload_len = header[2]; @@ -98,14 +103,8 @@ esp_err_t pn7150_read_rsp(uint8_t *buffer, size_t *length) if (payload_len == 0) return ESP_OK; // Leitura do payload restante - cmd = i2c_cmd_link_create(); - i2c_master_start(cmd); - i2c_master_write_byte(cmd, (PN7150_I2C_ADDRESS<<1) | I2C_MASTER_READ, true); - i2c_master_read(cmd, buffer+3, payload_len, I2C_MASTER_LAST_NACK); - i2c_master_stop(cmd); - err = i2c_master_cmd_begin(I2C_MASTER_NUM, cmd, pdMS_TO_TICKS(1000)); - i2c_cmd_link_delete(cmd); - return err; + ret = i2c_master_receive(pn7150_dev_handle, buffer + 3, payload_len, I2C_TIMEOUT_MS); + return ret; } // Executa CORE_RESET_CMD (Reset Type = Keep Config = 0x01) @@ -118,8 +117,6 @@ esp_err_t pn7150_core_reset(void) ESP_LOGE(TAG, "Erro I2C send CORE_RESET"); return err; } - // Aguarda IRQ ou pode esperar fixo - //vTaskDelay(pdMS_TO_TICKS(50)); uint8_t rsp[16] = {0}; size_t len = 0; err = pn7150_read_rsp(rsp, &len); @@ -143,8 +140,6 @@ esp_err_t pn7150_core_init(void) ESP_LOGE(TAG, "Erro I2C send CORE_INIT"); return err; } - // Aguardar IRQ / resposta - //vTaskDelay(pdMS_TO_TICKS(50)); uint8_t rsp[32] = {0}; size_t len = 0; err = pn7150_read_rsp(rsp, &len);