src/mainboard/protectli/vault_adl_p/devicetree.cb: enable wake on eth

Upstream-Status: Inappropriate [Dasharo downstream]
Signed-off-by: Wiktor Mowinski <wiktor.mowinski@3mdeb.com>

Author: wiktormowinski

src/mainboard/protectli/vault_adl_p/Kconfig

@@ -9,6 +9,7 @@ config BOARD_SPECIFIC_OPTIONS
 	select SUPERIO_ITE_IT8659E
 	select DRIVERS_UART_8250IO
 	select DRIVERS_I2C_GENERIC
+	select DRIVERS_PCIE_GENERIC
 	select DRIVERS_INTEL_PMC
 	select FSP_TYPE_IOT	# Needed for PchPcieClockGating W/A
 	select HAVE_ACPI_RESUME

src/mainboard/protectli/vault_adl_p/devicetree.cb

@@ -195,12 +195,16 @@ chip soc/intel/alderlake
 		# RP5-RP8 i226 LAN
 		device ref pcie_rp5 on
 			register "pch_pcie_rp[PCH_RP(5)]" = "{
-				.flags = PCIE_RP_LTR | PCIE_RP_AER,
+				.flags = PCIE_RP_LTR | PCIE_RP_AER | PCIE_RP_PM_ENABLE,
 				.pcie_rp_aspm = ASPM_L0S_L1,
 				.PcieRpL1Substates = L1_SS_DISABLED,
 				.clk_src = 2,
 				.clk_req = 2,
 			}"
+			chip drivers/pcie/generic
+        		register "wake" = "PE0_PME_B0"
+        		device pci 00.0 on end
+			end
 		end
 		device ref pcie_rp6 on
 			register "pch_pcie_rp[PCH_RP(6)]" = "{
@@ -210,6 +214,10 @@ chip soc/intel/alderlake
 				.clk_src = 0,
 				.clk_req = 0,
 			}"
+			chip drivers/pcie/generic
+        		register "wake" = "PE0_PME_B0"
+        		device pci 00.0 on end
+			end
 		end
 		device ref pcie_rp7 on
 			register "pch_pcie_rp[PCH_RP(7)]" = "{
@@ -218,6 +226,10 @@ chip soc/intel/alderlake
 				.PcieRpL1Substates = L1_SS_DISABLED,
 				.clk_src = 6,
 			}"
+			chip drivers/pcie/generic
+        		register "wake" = "PE0_PME_B0"
+        		device pci 00.0 on end
+			end
 		end
 		device ref pcie_rp8 on
 			register "pch_pcie_rp[PCH_RP(8)]" = "{
@@ -226,7 +238,12 @@ chip soc/intel/alderlake
 				.PcieRpL1Substates = L1_SS_DISABLED,
 				.clk_src = 5,
 			}"
-		end
+			chip drivers/pcie/generic
+        		register "wake" = "PE0_PME_B0"
+        		device pci 00.0 on end
+			end
+    	end
+	end
 		device ref pcie_rp10 on
 			register "pch_pcie_rp[PCH_RP(10)]" = "{
 				.flags = PCIE_RP_LTR | PCIE_RP_CLK_REQ_UNUSED,