From 1b3cba9f19d2fd11915afa45143cba57af7b36b2 Mon Sep 17 00:00:00 2001 From: Gagik Amirkhanyan Date: Mon, 9 Nov 2026 11:31:36 -0800 Subject: [PATCH] Align tpu_codesign README introduction with the GfD launch blog post. The existing README opened with a standalone noun-phrase fragment scoped narrowly to foundation models. Expand the opening into two complete sentences matching the GfD blog post's framing around TPU performance per TCO (wide systolic arrays, dedicated SparseCore engines, and custom interconnect fabrics) and broader applicability across LLMs, MoEs, and other hardware-intensive workloads. PiperOrigin-RevId: 1017505333 --- README.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/README.md b/README.md index 10b40d0..9c3f32a 100644 --- a/README.md +++ b/README.md @@ -2,7 +2,7 @@ [![License](https://img.shields.io/badge/License-Apache_2.0-blue.svg)](LICENSE) -Practical, hardware-grounded architectural design principles, Mixture-of-Experts (MoE) co-design patterns, low-precision numerics rules, and distributed systems mappings for training and serving foundation models on Google Cloud TPUs (Ironwood / TPU v7x and future TPU generations). +Google designed TPUs from the ground up for machine learning efficiency and performance per total cost of ownership (TCO), trading general-purpose hardware scheduling for wide systolic arrays, dedicated SparseCore engines, and custom interconnect fabrics. This living guide provides practical, hardware-grounded architectural design principles, Mixture-of-Experts (MoE) co-design patterns, low-precision numerics rules, and distributed systems mappings for training and serving LLMs, MoEs, and other hardware-intensive workloads on Google Cloud TPUs (Ironwood / TPU v7x and future TPU generations). * **Online Book & Blog:** * **Single-Page Guide:** [`docs/guide.md`](docs/guide.md)